SIT3232EESE from SIT, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	C1+	passive	Positive terminal for the first charge pump flying capacitor (C1). Connect a 1uF capacitor between C1+ and C1- for the voltage doubler stage.
2	V+	power_out	Doubled voltage terminal (approx. +2*VCC) generated by the internal charge pump. Bypass with a 1uF capacitor to GND. Absolute max VCC-0.3 to +7V.
3	C1-	passive	Negative terminal for the first charge pump flying capacitor (C1). Connect a 1uF capacitor between C1+ and C1-.
4	C2+	passive	Positive terminal for the second charge pump flying capacitor (C2). Connect a 1uF capacitor between C2+ and C2- for the voltage inverter stage.
5	C2-	passive	Negative terminal for the second charge pump flying capacitor (C2). Connect a 1uF capacitor between C2+ and C2-.
6	V-	power_out	Inverted voltage terminal (approx. -2*VCC) generated by the internal charge pump. Bypass with a 1uF capacitor to GND. Absolute max +0.3 to -7V.
7	T2OUT	output	Second transmitter (driver) RS-232 output. Swing typically +/-5V into a 3kOhm load. ESD protected to +/-15kV HBM and +/-8kV IEC contact discharge. Short-circuit current limited to 60mA.
8	R2IN	input	Second receiver RS-232 line input. Accepts +/-25V input range with typical +/-1.1V/+/-1.5V thresholds and 3-7kOhm input impedance. ESD protected to +/-15kV HBM.
9	R2OUT	output	Second receiver TTL/CMOS logic output. Drives logic-low <=0.4V at 1.6mA, logic-high >=VCC-0.6V at 0.5mA sourcing.
10	T2IN	input	Second transmitter (driver) TTL/CMOS logic input. VIL max 0.8V, VIH min 2V, ~0.3V hysteresis, input leakage +/-1uA.
11	T1IN	input	First transmitter (driver) TTL/CMOS logic input. VIL max 0.8V, VIH min 2V, ~0.3V hysteresis, input leakage +/-1uA.
12	R1OUT	output	First receiver TTL/CMOS logic output. Drives logic-low <=0.4V at 1.6mA, logic-high >=VCC-0.6V at 0.5mA sourcing.
13	R1IN	input	First receiver RS-232 line input. Accepts +/-25V input range with typical +/-1.1V/+/-1.5V thresholds and 3-7kOhm input impedance. ESD protected to +/-15kV HBM.
14	T1OUT	output	First transmitter (driver) RS-232 output. Swing typically +/-5V into a 3kOhm load. ESD protected to +/-15kV HBM and +/-8kV IEC contact discharge. Short-circuit current limited to 60mA.
15	GND	power_in	Ground reference for the device. All voltages are referenced to this pin.
16	VCC	power_in	Positive supply voltage input. Operating range 3V to 5.5V (typ 3.3V). Bypass with a 1uF capacitor to GND. Typical no-load supply current 2mA.

Key specifications

Parameter	Value
Manufacturer	SIT
Package	SOP-16
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

SIT3232EESE

CAD (KiCad official)

Symbol: SIT3232EESE
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sit3232eese.step`	217 KB	You want the bare part, or you mark your own boards.
`sit3232eese-etched.step`	2.8 MB	You want the part with `SIT3232EESE` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 692 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: SIT datasheet (12 pp, sha256 2714c7267d52ec1d, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF