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SIT1050T

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by Ray

SIT CAN Controllers, SO-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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SIT1050T

SIT · CAN Controllers · SO-8

SIT1050T from SIT, in a SO-8. Pinout and pin descriptions extracted from the datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXD input Transmit data input from the CAN controller. CMOS-level logic input (VIH ≥ 2 V, VIL ≤ 0.8 V) with internal pull-up (IIL = -10 to -50 µA at VI = 0 V; IIH = ±2 µA at VI = VCC). A low level drives the bus dominant; high or open leaves the bus recessive. A dominant time-out (typ. 450 µs) prevents the bus from being held dominant indefinitely.
2 GND power_in Ground supply reference (0 V). The exposed thermal pad of the DFN3x3-8/HVSON8 variant is internally connected to this pin and should be soldered to board ground for enhanced thermal performance.
3 VCC power_in +5 V supply voltage input (recommended 4.5-5.5 V, abs-max -0.3 to +6 V). Typical supply current is ~6 mA in recessive/silent state and ~50 mA (max 70 mA) in dominant state with 60 Ω load.
4 RXD output Receive data output to the CAN controller; reads out the differential state of the CAN bus. Push-pull CMOS output (VOH ≥ 4 V at IO = -2 mA, VOL ≤ 0.4 V at IO = 2 mA). LOW = dominant bus, HIGH = recessive bus.
5 Vref output Reference voltage output at 0.5·VCC (spec 0.4·VCC to 0.6·VCC) capable of sourcing/sinking
6 CANL bidirectional LOW-level CAN bus line (differential pair with CANH). Driven low (VOL(D) 0.5-2.25 V, typ 1.5 V) in the dominant state and biased to 0.5·VCC in the recessive state. Handles DC bus voltages of -40 to +40 V and transient ±200 V (see Fig. 7); short-circuit currents are limited by internal protection.
7 CANH bidirectional HIGH-level CAN bus line (differential pair with CANL). Driven high (VOH(D) 2.75-4.5 V, typ 3.5 V) in the dominant state and biased to 0.5·VCC in the recessive state. Handles DC bus voltages of -40 to +40 V and transient ±200 V; internal short-circuit and overcurrent protection.
8 S input Silent-mode control input (a.k.a. STB). LOW or open = normal (transmitter enabled); HIGH = silent mode (transmitter disabled, receiver still active). VIH ≥ 2.0 V, VIL ≤ 0.8 V; input current 15-60 µA at VS = 2 V. Enable time from silent to dominant ≤ 1 µs.

Key specifications

Parameter Value
Manufacturer SIT
Package SO-8
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SIT1050TT

CAD (KiCad official)

  • Symbol: SIT1050T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sit1050t.step 122 KB You want the bare part, or you mark your own boards.
sit1050t-etched.step 1.7 MB You want the part with SIT1050T already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 437 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SIT datasheet (17 pp, sha256 32c8f1165b0507ef, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF