SIT1021T from SIT, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RXD	output	Receive data output (open-drain). Presents the LIN bus data stream to the microcontroller; high = recessive, low = dominant. Drives active LOW after a wake-up event. Requires an external pull-up. Low-level output current typ. 1.5 mA (V_RXD=0.4 V).
2	SLP_N	input	Sleep control input (active LOW). Controls the INH output and resets the wake-up source flag on TXD and wake-up request on RXD. Internal pull-down (140-1200 kΩ, typ. 500 kΩ) forces sleep if left floating. V_IH ≥ 2 V, V_IL ≤ 0.8 V; abs max −0.3 to +7 V.
3	WAKE_N	input	Local wake-up input (active LOW); negative edge triggered. Internal pull-up path to VBAT; tolerates −0.3 to +42 V. If unused, tie to VBAT to prevent EMI issues. V_IH ≥ VBAT−1 V, V_IL ≤ VBAT−3.3 V.
4	TXD	input	Transmit data input from the microcontroller; LOW drives the LIN bus dominant, HIGH recessive. Becomes an active LOW output after a local wake-up event to indicate wake-up source. Internal pull-down (140-1200 kΩ, typ. 500 kΩ) applies a safe default when unused. V_IH ≥ 2 V, V_IL ≤ 0.8 V.
5	GND	power_in	Ground reference for all pins. On the DFN3x3-8 (SIT1021TK) variant the exposed thermal pad is internally connected to GND and should be soldered to board ground for improved thermal dissipation.
6	LIN	bidirectional	LIN bus line I/O. Single-wire physical bus interface, compliant with LIN 2.x / ISO 17987-4:2016 (12V) and SAE J2602. Withstands ±42 V. Internally pulled high via slave termination resistor (30 kΩ typ.) and a series diode; master applications require an external ~1 kΩ pull-up plus series diode to VBAT.
7	VBAT	power_in	Battery supply voltage input. Operating range in automotive 12 V systems; absolute max −0.3 to +42 V. Power-on-reset thresholds: V_th(VBATL)L 3.9-4.7 V, V_th(VBATL)H 4.2-5.1 V. Typical current draw 3 µA (Sleep) / 380 µA (Normal recessive) / 1.4 mA (Normal dominant, VBAT=12 V).
8	INH	output	Battery-related inhibit output for controlling an external voltage regulator. Active HIGH after a wake-up event; floats in Sleep mode and is high in all other modes. Output voltage range −0.3 V to VBAT+0.3 V.

Key specifications

Parameter	Value
Manufacturer	SIT
Package	SOP-8
Category	Comm/UART
Pins	8

Ordering variants

Same part, different packaging or reel option.

SIT1021TT
SIT1021TTK

CAD (KiCad official)

Symbol: SIT1021T
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sit1021t.step`	122 KB	You want the bare part, or you mark your own boards.
`sit1021t-etched.step`	1.6 MB	You want the part with `SIT1021T` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 405 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: SIT datasheet (19 pp, sha256 a35d31ff292b26eb, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF