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Contents

README

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SG3525-HXY

HXY MOSFET · AC-DC Controllers and Regulators · SOP-16

SG3525-HXY from HXY MOSFET, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Inv. Input input Inverting input of the internal error amplifier. Common-mode range includes the 5.1 V reference so no external divider is required when regulating to VREF.
2 Noninv. Input input Non-inverting input of the internal error amplifier. Typical input offset 1.5 mV, bias current 1 µA, CMRR 90 dB.
3 Sync bidirectional Oscillator sync input/output for master/slave operation or synchronization with an external clock. Sync threshold typ 2 V; sync input current typ 1.3 mA at 3.5 V.
4 OSC. Output output Oscillator clock output. Provides the internal clock signal (typ 3 V amplitude, 0.6 µs width) for external use or scope monitoring.
5 CT passive Oscillator timing capacitor. Combined with RT (pin 6) sets the switching frequency (100 Hz-500 kHz range). Typical charging current 50 µA.
6 RT passive Oscillator timing resistor. Sets the oscillator charge current; typical range 2 kΩ (430 kHz) to 200 kΩ (60 Hz-120 Hz) with the corresponding CT.
7 Discharge passive Deadtime/discharge pin. A resistor between CT (pin 5) and Discharge sets the oscillator discharge time, which controls the deadtime between the A and B outputs.
8 Soft-Start passive Soft-start capacitor pin. An internal 50 µA current source charges the external capacitor to ramp up the duty cycle at startup. Typical soft-start current 51 µA.
9 Compensation output Error amplifier output and PWM comparator input. Loop compensation network (typically a resistor and capacitor to Inv. Input) is connected here.
10 Shutdown input Active-high shutdown input. Threshold typ 0.8 V (min 0.6 V, max 1 V). Asserting shutdown initiates the pulse-by-pulse latch-off, discharges the soft-start capacitor, and disables both outputs.
11 Output A output Push-pull totem-pole gate driver output A. Sources/sinks >200 mA (500 mA absolute max). Alternates with Output B; typ rise/fall 80 ns / 70 ns into 1 nF.
12 Ground power_in Signal and power ground return for the device.
13 VC power_in Collector supply for the output driver stage. Rated 40 V absolute maximum; usually tied to VCC but can be biased separately to drive gates from a different rail.
14 Output B output Push-pull totem-pole gate driver output B. Complementary phase to Output A for push-pull / half-bridge / full-bridge topologies. Same drive spec as Output A.
15 VCC power_in Main supply input. Operating range 8-35 V; 40 V absolute maximum. UVLO turns the device on around 7 V typical (6-8 V) with hysteresis. Typical ICC 12 mA.
16 Vref power_out 5.1 V ±1% precision reference output. Short-circuit current typ 80 mA (limit 100 mA); intended for biasing external circuitry, decouple with ~0.1 µF to ground.

Key specifications

Parameter Value
Manufacturer HXY MOSFET
Package SOP-16
Category PMIC
Pins 16

CAD (KiCad official)

  • Symbol: SG3525-HXY
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: sg3525-hxy-etched.step / sg3525-hxy-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sg3525-hxy.step / sg3525-hxy.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HXY MOSFET datasheet (7 pp, sha256 523bdd7216fb17e2, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF