RT2872GSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SW	power_out	Switch node. Drain of the high-side and low-side internal N-MOSFETs. Connect to the external inductor and to the boot capacitor return.
2	BOOT	power_in	Bootstrap supply for the high-side N-MOSFET gate driver. Connect a ceramic capacitor (typ. 0.1µF) from BOOT to SW to develop the floating gate-drive rail.
3	EN	input	Chip enable. Drive high (>2.0V) to enable the converter, low (<0.4V) to disable. On the EVB, EN is pulled to VIN via a 100kΩ resistor (R4) for auto-enable operation.
4	GND	power_in	Device ground. Also tied to the exposed thermal pad on the underside of the SOP-8 package; solder the exposed pad to a ground copper plane for thermal dissipation.
5	COMP	output	Error-amplifier output / loop compensation node. Connect an external RC network (typ. series R + C to GND) to set the loop bandwidth and phase margin of the current-mode control loop.
6	FB	input	Feedback input to the internal error amplifier. Connect to the midpoint of the R1/R2 divider between VOUT and GND. Reference voltage is 0.8V; VOUT = 0.8V x (1 + R1/R2).
7	RT	input	Oscillator frequency programming pin. Connect a resistor from RT to GND to set switching frequency between 300kHz and 1MHz (EVB uses 137kΩ / 113kΩ resistor on this pin).
8	VIN	power_in	Main input supply, 4.5V to 36V. Bypass to GND with low-ESR ceramic capacitors (EVB uses 2x 10µF/50V X5R plus 0.1µF) placed close to the pin.
9	EP (GND)	power_in	Exposed thermal pad on the bottom of the package. Electrically tied to GND (pin 4). Must be soldered to a GND copper pour for proper thermal performance.

Key specifications

Parameter	Value
Manufacturer	Richtek Tech
Package	SOP-8-EP
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

RT2872GSP

CAD (KiCad official)

Symbol: RT2872GSP
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
3D model: SOP-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`rt2872gsp.step`	193 KB	You want the bare part, or you mark your own boards.
`rt2872gsp-etched.step`	1.8 MB	You want the part with `RT2872GSP` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 450 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Richtek Tech datasheet (11 pp, sha256 c32ddb3a6bfb0393, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF