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PJ7812TE

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252

PJ7812TE from PJSEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Unregulated positive supply input. Accepts up to 35V absolute maximum; recommended operating range 14.5V to 27V for the 12V variant. Requires a 0.33 µF input bypass capacitor (CI) close to the pin for stability.
2 GND power_in Common ground reference for the regulator. This pin is connected to the tab/heat-slug of the TO-252 package and carries the quiescent current (typ. ~5 mA) plus load return.
3 VOUT power_out Regulated +12V output. Delivers 11.4V-12.6V over full line/load range and up to 1.5A with adequate heatsinking. Requires a 0.1 µF output capacitor (CO) close to the pin for transient response.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package TO-252
Category PMIC
Pins 3

Ordering variants

  • PJ7812TE

CAD (KiCad official)

  • Symbol: PJ7812TE
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (None pp, sha256 43dcca55204e766a, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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