PJ75AL50SA from PJSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground / common return for the regulator. Bond the input and output capacitor grounds back to this pin with wide, short traces (single-point GND).
2	VOUT	power_out	Regulated output voltage pin. Fixed 5.0V (±2%) for the -50 option, delivering up to 100mA. Requires a ≥10µF X7R/X5R ceramic capacitor to GND placed close to the pin for stability.
3	VIN	power_in	Unregulated supply input, absolute max 36V (-0.3 to +36V). Requires a 10µF ceramic decoupling capacitor to GND close to the pin. Dropout ≈25mV typ at 1mA for 5V option.

Key specifications

Parameter	Value
Manufacturer	PJSEMI
Package	SOT-23
Category	PMIC
Pins	3

Ordering variants

Same part, different packaging or reel option.

PJ75AL50SA
PJ75AL50SASC
PJ75AL50SASQ
PJ75AL50SASE

CAD (KiCad official)

Symbol: PJ75AL50SA
Footprint: Package_TO_SOT_SMD:SOT-23
3D model: SOT-23 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`pj75al50sa.step`	59 KB	You want the bare part, or you mark your own boards.
`pj75al50sa-etched.step`	1.7 MB	You want the part with `PJ75AL50SA` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 410 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: PJSEMI datasheet (9 pp, sha256 ec9ac50694a28a8f, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF