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pj73al30sq

Public Made by Adom

by adom

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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README

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PJ73AL30SQ

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89

PJ73AL30SQ from PJSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / common return for the regulator. Tie to the single-point ground of the input and output bypass capacitors (10μF typical on each rail per the application circuit).
2 VIN power_in Unregulated supply input, 0 to +20V operating (absolute max +22V). Requires a 10μF bypass capacitor to GND close to the pin; VIN should be at least VOUT + ~0.3V (typ 210mV dropout at 100mA for the 3.0V option) for regulation.
3 VOUT power_out Regulated 3.0V output (2.94V min / 3.06V max at IOUT=10mA), up to 300mA continuous, short-circuit current ~400mA. Requires a 10μF bypass capacitor to GND close to the pin for stability.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-89
Category PMIC
Pins 3

Ordering variants

  • PJ73AL30SQ

CAD (KiCad official)

  • Symbol: PJ73AL30SQ
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: pj73al30sq-etched.step / pj73al30sq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj73al30sq.step / pj73al30sq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (None pp, sha256 54849466aae8d33f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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