component

PJ71K30SQ

Public Made by Adom

by adom

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentpmicpj71k30sq
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

PJ71K30SQ

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89

PJ71K30SQ from PJSEMI, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the regulator. Connect to the system single-point ground.
2 VIN power_in Unregulated supply input. Operating range up to 24V (absolute max 28V). Bypass with ~10µF to GND close to the pin.
3 VOUT power_out Regulated 3.0V ±5% output, up to 30mA (typ 20mA). Requires ~10µF output capacitor to GND for stability.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-89
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PJ71K30SQ

CAD (KiCad official)

  • Symbol: PJ71K30SQ
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: pj71k30sq-etched.step / pj71k30sq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj71k30sq.step / pj71k30sq.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
pj71k30sq.step 57 KB You want the bare part, or you mark your own boards.
pj71k30sq-etched.step 1.3 MB You want the part with PJ71K30SQ already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 342 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (7 pp, sha256 d91f765101749d8c, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF