A stereo audio analog-to-digital converter in TSSOP-14, the input-side counterpart of the PCM5102A DAC. It digitizes a left/right line-level analog signal (VINL, VINR) to 24-bit samples at up to 96 kHz using a delta-sigma modulator with 64x oversampling, and streams the result out as I2S (BCK, LRCK, DOUT). A single-ended input stage keeps the external circuit simple, format and mode pins configure the I2S variant and sampling, and it needs only a system clock (SCKI) plus decoupling. It is a common front end for USB audio interfaces, mixers, and recording gear. Runs 5 V analog / 3.3 V digital.

Pinout

Pin	Name	Type	Function
1	VREF	passive	Reference-voltage decoupling pin at 0.5 x VCC (~2.5 V nominal with VCC = 5 V). Bypass to AGND with a decoupling capacitor; do not drive externally.
2	AGND	power_in	Analog ground return for the 5-V analog supply (VCC) and analog input circuitry.
3	VCC	power_in	Analog power supply, 5 V nominal (4.5 - 5.5 V recommended, 6.5 V absolute max). Typical ICC = 8.6 mA at fs = 48/96 kHz.
4	VDD	power_in	Digital power supply, 3.3 V nominal (2.7 - 3.6 V recommended, 4 V absolute max). Typical IDD = 5.9 mA at fs = 48 kHz, 10.2 mA at 96 kHz.
5	DGND	power_in	Digital ground return for the 3.3-V digital supply (VDD) and digital I/O.
6	SCKI	input	System clock input; 256 fs, 384 fs, or 512 fs (2.048 - 49.152 MHz). Schmitt-trigger, 5-V tolerant. Halting SCKI (along with BCK/LRCK) invokes power-down and internal reset.
7	LRCK	bidirectional	Audio-data left/right latch-enable (word-select / LRCLK). Input in slave mode, output in master mode. Schmitt-trigger input with 50-kohm typical internal pulldown (slave mode).
8	BCK	bidirectional	Audio-data serial bit clock (BCLK). Input in slave mode, output in master mode. Schmitt-trigger input with 50-kohm typical internal pulldown (slave mode).
9	DOUT	output	Audio-data serial digital output (SDATA), 24-bit MSB-first two's complement. Driven per FMT selection (I2S or left-justified).
10	MD0	input	Audio-interface mode select 0. Together with MD1 selects master/slave mode and BCK/LRCK ratios. Schmitt-trigger input with 50-kohm typical internal pulldown, 5-V tolerant.
11	MD1	input	Audio-interface mode select 1. Together with MD0 selects master/slave mode and BCK/LRCK ratios. Schmitt-trigger input with 50-kohm typical internal pulldown, 5-V tolerant.
12	FMT	input	Audio-interface data-format select: I2S vs 24-bit left-justified on DOUT. Schmitt-trigger input with 50-kohm typical internal pulldown, 5-V tolerant.
13	VINL	input	Single-ended analog input, left channel. Full-scale input 3 Vp-p (0.6 x VCC) centered at VREF (0.5 x VCC ~ 2.5 V). Input impedance 60 kohm typical.
14	VINR	input	Single-ended analog input, right channel. Full-scale input 3 Vp-p (0.6 x VCC) centered at VREF (0.5 x VCC ~ 2.5 V). Input impedance 60 kohm typical.

Key specifications

Parameter	Value
Type	Stereo audio ADC (I2S)
Resolution	24-bit
Sample rate	up to 96 kHz
Input	single-ended line-level (L/R)
Architecture	delta-sigma, 64x oversampling
Output	I2S (BCK/LRCK/DOUT)
SNR	99 dB
Package	TSSOP-14

Ordering variants

Same part, different packaging or reel option.

PCM1808PWR (TSSOP-14)
PCM1808PW (TSSOP-14, tube)

CAD (KiCad official)

Symbol: PCM1808 (generated from datasheet; KiCad has no symbol)
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (32 pp, sha256 4ac1a7ec0c05ee97, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF