Adds eight general-purpose I/O pins over I2C, each set as input or output through a configuration register, with a hardware RESET input that returns the device to its power-on state on demand. A polarity-inversion register lets active-low inputs read as active-high without host logic, and three address pins put up to eight devices on one bus. It runs from 2.3 to 5.5 V. A compact, resettable I/O expander for switches, LEDs, and enable lines.

Pinout

Pin	Name	Type	Function
1	A0	input	Hardware I2C address input bit 0. Tie directly to VCC or GND to program the device's I2C slave address (up to 8 devices per bus).
2	A1	input	Hardware I2C address input bit 1. Tie directly to VCC or GND.
3	A2	input	Hardware I2C address input bit 2. Tie directly to VCC or GND.
4	IO0	bidirectional	P-port I/O bit 0. High-impedance open-drain output structure; requires an external pullup to VCC when driven high. Configured as input at power-on.
5	IO1	bidirectional	P-port I/O bit 1. Push-pull output; sinks up to 25 mA to drive LEDs directly. Input at power-on.
6	VSS	power_in	Ground reference for supply and I/O.
7	IO2	bidirectional	P-port I/O bit 2. Push-pull output; 25 mA sink capability. Input at power-on.
8	IO3	bidirectional	P-port I/O bit 3. Push-pull output; 25 mA sink capability. Input at power-on.
9	IO4	bidirectional	P-port I/O bit 4. Push-pull output; 25 mA sink capability. Input at power-on.
10	IO5	bidirectional	P-port I/O bit 5. Push-pull output; 25 mA sink capability. Input at power-on.
11	IO6	bidirectional	P-port I/O bit 6. Push-pull output; 25 mA sink capability. Input at power-on.
12	IO7	bidirectional	P-port I/O bit 7. Push-pull output; 25 mA sink capability. Input at power-on.
13	RESET	input	Active-low reset input. Asserting low reinitializes the registers and I2C/SMBus state machine. Tie to VCC through a pullup if unused.
14	VDD	power_in	Supply voltage, 2.3 V to 5.5 V. Decouple with a 0.1 µF ceramic capacitor to GND close to the pin.
15	SCL	input	I2C serial clock input. Requires an external pullup resistor to VCC. Supports 100 kHz standard mode and 400 kHz fast mode.
16	SDA	bidirectional	I2C serial data line, open-drain bidirectional. Requires an external pullup resistor to VCC.

Key specifications

Parameter	Value
Type	8-bit I2C I/O expander
Interface	I2C (up to 400 kHz)
I/O	8 pins (IO0-IO7)
Reset	Hardware RESET input
Polarity	Per-pin inversion register
Addresses	8 (A0-A2)
Supply	2.3-5.5 V
Package	HVQFN-16

Ordering variants

Same part, different packaging or reel option.

PCA9557PW (TSSOP-16)
PCA9557BS (HVQFN-16)
PCA9557D (SOIC-16)

CAD (KiCad official)

Symbol: Interface_Expansion:PCA9557BS (KiCad official)
Footprint: Package_DFN_QFN:HVQFN-16-1EP_3x3mm_P0.5mm_EP1.5x1.5mm
3D model: HVQFN-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (47 pp, sha256 d55cbe207fbcb26d, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF