Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

OB5686TCPA-H

OB On Bright Elec · PFC Controllers · SOP-8

OB5686TCPA-H from OB On Bright Elec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Current sense input pin. Senses the primary MOSFET switching current via an external sense resistor between the source and GND for cycle-by-cycle overcurrent limiting. Over-current threshold Vth_ocp ~0.7 V (typical) at Ton=0us, with leading-edge blanking of ~420 ns.
2 VDD power_in IC power supply pin. Charged via the HV startup circuit at power-on, then held up by the auxiliary winding during operation. UVLO_off ~16.2 V (rising), UVLO_on ~8 V (falling), VDD_ovp ~32 V; absolute max 40 V. Static current IVDD_op ~850 uA at VDD=20 V.
3 GND power_in Power ground / signal ground return for the IC and the current-sense resistor.
4 FB input Output voltage feedback pin. Samples the auxiliary-winding (flyback) or buck-inductor voltage through a resistor divider to regulate the output using an internal reference Vref ~2.5 V. Also used for quasi-resonant detection, output OVP (~3.2 V) and short-circuit protection (~0.4 V). Absolute max -1 to 7 V.
5 HV power_in High-voltage startup pin. Connects through a ~20 kΩ (typical) resistor to the rectified AC bus and delivers ~1 mA to charge the VDD capacitor at startup, then shuts off after UVLO_off. Absolute max -0.3 to 700 V.
6 NC unconnected No connection. Leave floating on the PCB.
7 DRAIN power_out Drain terminal of the internal power MOSFET. Pins 7 and 8 are internally tied to the same drain node and should be connected in parallel to reduce impedance and improve thermal dissipation. BVdss = 650 V for the -H suffix.
8 DRAIN power_out Drain terminal of the internal power MOSFET. Pins 7 and 8 are internally tied to the same drain node and should be connected in parallel to reduce impedance and improve thermal dissipation. BVdss = 650 V for the -H suffix.

Key specifications

Parameter Value
Manufacturer OB On Bright Elec
Package SOP-8
Category Power Management (PMIC)
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • OB5686TCPA-H

CAD (KiCad official)

  • Symbol: OB5686TCPA-H
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: OB On Bright Elec datasheet (11 pp, sha256 27ab41ecce3fa2e5, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF