NUC029LAN
Public Unreviewedby Ray
Nuvoton Tech Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownNUC029LAN
Nuvoton Tech · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
NUC029LAN from Nuvoton Tech, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.5/AIN5/ACMP0_P/MOSI_0 | bidirectional | GPIO P1.5; also ADC5 analog input, Comparator0 positive input, and SPI0 MOSI. |
| 2 | P1.6/AIN6/MISO_0/ACMP2_N | bidirectional | GPIO P1.6; also ADC6 analog input, SPI0 MISO, and Comparator2 negative input. |
| 3 | P1.7/AIN7/SPICLK0/ACMP2_P | bidirectional | GPIO P1.7; also ADC7 analog input, SPI0 serial clock, and Comparator2 positive input. |
| 4 | nRST | input | External reset input, active-LOW with internal pull-up (Schmitt trigger). Drive low to reset the chip to its initial state. |
| 5 | P3.0/RXD/ACMP1_N | bidirectional | GPIO P3.0; also UART0 RXD data receiver input and Comparator1 negative input. |
| 6 | AVSS | power_in | Analog ground reference for the analog circuits (ADC/ACMP). |
| 7 | P3.1/TXD/ACMP1_P | bidirectional | GPIO P3.1; also UART0 TXD data transmitter output and Comparator1 positive input. |
| 8 | P3.2/nINT0/STADC/T0EX | bidirectional | GPIO P3.2; also external interrupt0, ADC external trigger, and Timer0 external capture/reset trigger input. |
| 9 | P3.3/nINT1/MCLK/T1EX | bidirectional | GPIO P3.3; also external interrupt1, EBI external clock output, and Timer1 external capture/reset trigger input. |
| 10 | P3.4/T0/SDA0 | bidirectional | GPIO P3.4; also Timer0 external event counter input and I2C0 SDA data line. |
| 11 | P3.5/T1/SCL0/CKO | bidirectional | GPIO P3.5; also Timer1 external event counter input, I2C0 SCL clock line, and frequency divider output. |
| 12 | P4.3/PWM3 | bidirectional | GPIO P4.3; also PWM3 output / capture input. |
| 13 | P3.6/CKO/ACMP0_O/nWR | bidirectional | GPIO P3.6; also frequency divider output, analog Comparator0 output, and EBI write enable output. |
| 14 | P3.7/nRD | bidirectional | GPIO P3.7; also EBI read enable output. |
| 15 | XTAL2 | output | External 4-24 MHz high-speed crystal output pin (HXT). |
| 16 | XTAL1 | input | External 4-24 MHz high-speed crystal input pin (HXT, Schmitt-trigger). |
| 17 | VSS | power_in | Ground reference for the digital circuit. |
| 18 | LDO_CAP | passive | Internal LDO output; connect an external decoupling/bypass capacitor to VSS. |
| 19 | P2.0/AD8/PWM0 | bidirectional | GPIO P2.0; also EBI Address/Data bus bit 8 and PWM0 output/capture input. |
| 20 | P2.1/AD9/PWM1 | bidirectional | GPIO P2.1; also EBI Address/Data bus bit 9 and PWM1 output/capture input. |
| 21 | P2.2/PWM2/AD10 | bidirectional | GPIO P2.2; also PWM2 output/capture input and EBI Address/Data bus bit 10. |
| 22 | P2.3/PWM3/AD11 | bidirectional | GPIO P2.3; also PWM3 output/capture input and EBI Address/Data bus bit 11. |
| 23 | P2.4/PWM4/SCL1/AD12 | bidirectional | GPIO P2.4; also PWM4 output/capture input, I2C1 SCL clock line, and EBI Address/Data bus bit 12. |
| 24 | P4.0/PWM0/T2EX | bidirectional | GPIO P4.0; also PWM0 output/capture input and Timer2 external capture/reset trigger input. |
| 25 | P2.5/PWM5/SDA1/AD13 | bidirectional | GPIO P2.5; also PWM5 output/capture input, I2C1 SDA data line, and EBI Address/Data bus bit 13. |
| 26 | P2.6/PWM6/ACMP1_O/AD14 | bidirectional | GPIO P2.6; also PWM6 output/capture input, analog Comparator1 output, and EBI Address/Data bus bit 14. |
| 27 | P2.7/AD15/PWM7 | bidirectional | GPIO P2.7; also EBI Address/Data bus bit 15 and PWM7 output/capture input. |
| 28 | P4.4/nCS/SCL1 | bidirectional | GPIO P4.4; also EBI chip select enable output and I2C1 SCL clock line. |
| 29 | P4.5/ALE/SDA1 | bidirectional | GPIO P4.5; also EBI address latch enable output and I2C1 SDA data line. |
| 30 | P4.6/ICE_CLK | bidirectional | GPIO P4.6; also Serial Wired Debug clock (ICE_CLK) input. |
| 31 | P4.7/ICE_DAT | bidirectional | GPIO P4.7; also Serial Wired Debug data (ICE_DAT) bidirectional. |
| 32 | P0.7/SPICLK1/AD7 | bidirectional | GPIO P0.7; also SPI1 serial clock and EBI Address/Data bus bit 7. |
| 33 | P0.6/MISO_1/AD6 | bidirectional | GPIO P0.6; also SPI1 MISO and EBI Address/Data bus bit 6. |
| 34 | P0.5/MOSI_1/AD5 | bidirectional | GPIO P0.5; also SPI1 MOSI and EBI Address/Data bus bit 5. |
| 35 | P0.4/SPISS1/AD4 | bidirectional | GPIO P0.4; also SPI1 slave-select and EBI Address/Data bus bit 4. |
| 36 | P4.1/PWM1/T3EX | bidirectional | GPIO P4.1; also PWM1 output/capture input and Timer3 external capture/reset trigger input. |
| 37 | P0.3/AD3/RTS0/RXD | bidirectional | GPIO P0.3; also EBI Address/Data bus bit 3, UART0 RTS output, and UART0 RXD input (mux-assignable). |
| 38 | P0.2/AD2/CTS0/TXD | bidirectional | GPIO P0.2; also EBI Address/Data bus bit 2, UART0 CTS input, and UART0 TXD output (mux-assignable). |
| 39 | P0.1/RTS1/RXD1/ACMP3_N/AD1 | bidirectional | GPIO P0.1; also UART1 RTS output, UART1 RXD input, Comparator3 negative input, and EBI Address/Data bus bit 1. |
| 40 | P0.0/CTS1/TXD1/ACMP3_P/AD0 | bidirectional | GPIO P0.0; also UART1 CTS input, UART1 TXD output, Comparator3 positive input, and EBI Address/Data bus bit 0. |
| 41 | VDD | power_in | Digital power supply for I/O ports and LDO source for the internal PLL and digital circuit. Typical 2.5-5.5 V. |
| 42 | AVDD | power_in | Analog power supply for the internal analog circuits (ADC, ACMP, references). |
| 43 | P1.0/AIN0/T2/nWRL | bidirectional | GPIO P1.0; also ADC0 analog input, Timer2 external event counter input, and EBI low-byte write enable output. |
| 44 | P1.1/AIN1/T3/nWRH | bidirectional | GPIO P1.1; also ADC1 analog input, Timer3 external event counter input, and EBI high-byte write enable output. |
| 45 | P1.2/AIN2/RXD1 | bidirectional | GPIO P1.2; also ADC2 analog input and UART1 RXD input. |
| 46 | P1.3/AIN3/TXD1 | bidirectional | GPIO P1.3; also ADC3 analog input and UART1 TXD output. |
| 47 | P1.4/AIN4/ACMP0_N/SPISS0 | bidirectional | GPIO P1.4; also ADC4 analog input, Comparator0 negative input, and SPI0 slave-select. |
| 48 | P4.2/PWM2 | bidirectional | GPIO P4.2; also PWM2 output/capture input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | LQFP-48(7x7) |
| Category | MCU |
| Pins | 48 |
Ordering variants
Same part, different packaging or reel option.
NUC029LANNUC029TANNUC029FAE
CAD (KiCad official)
- Symbol:
NUC029LAN - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
nuc029lan.step |
617 KB | You want the bare part, or you mark your own boards. |
nuc029lan-etched.step |
3.8 MB | You want the part with NUC029LAN already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 978 faces against 747 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nuvoton Tech datasheet (99 pp, sha256
60002adeeda3bc67, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).