component
NDP1360KC
Public Made by Adomby adom
NDP DC-DC Converters, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownNDP1360KC
NDP · DC-DC Converters · SOP-8
NDP1360KC from NDP, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback of output voltage. Connect a resistor divider from VOUT to this pin; the internal reference is 1.0V (VREF = 0.985 to 1.015V) and FB bias current is ≤0.2µA. |
| 2 | CSP | input | Positive pole of the current-sense amplifier. Connects to the high side of the external current-sense element; sensed with respect to CSN1/CSN2 with a typical 55mV threshold (51-59mV) for cycle-by-cycle current limiting. Absolute max -0.3 to 25V vs GND. |
| 3 | CSN1 | input | Negative pole 1 of current sense. Forms channel-1 differential input with CSP (VCS1 = 51/55/59mV min/typ/max) for dual-channel CC/CV mode control. Absolute max -0.3 to 25V vs GND. |
| 4 | CSN2 | input | Negative pole 2 of current sense. Forms channel-2 differential input with CSP (VCS2 = 51/55/59mV min/typ/max) for dual-channel CC/CV mode control. Absolute max -0.3 to 25V vs GND. |
| 5 | GND | power_in | Device ground return. Connect to the system ground plane with a low-impedance path close to the input capacitor. |
| 6 | VIN | power_in | Power input to the converter and internal high-side MOSFET drain. Operating range 7.5V to 30V (absolute max 33V). Bypass with a ≥2.2µF ceramic capacitor placed close to the pin. |
| 7 | BST | passive | Bootstrap capacitor pin for the high-side MOSFET gate driver. Connect a 100nF ceramic capacitor from BST to SW. Absolute max -0.3V to VIN+7V vs GND. |
| 8 | SW | power_out | Switching node - common source/drain of the internal high-side and low-side MOSFETs (RDSON ≈ 12mΩ each). Connect to the external inductor (typ. 22µH). Absolute max -0.3V to VIN+0.3V vs GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NDP |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
NDP1360KC
CAD (KiCad official)
- Symbol:
NDP1360KC - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ndp1360kc-etched.step/ndp1360kc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ndp1360kc.step/ndp1360kc.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ndp1360kc.step |
122 KB | You want the bare part, or you mark your own boards. |
ndp1360kc-etched.step |
2.0 MB | You want the part with NDP1360KC already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 483 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NDP datasheet (14 pp, sha256
68b5401ff6b119ab, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).