NCP1252EDR2G
Public Unreviewedby Ray
onsemi AC-DC Controllers and Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownNCP1252EDR2G
onsemi · AC-DC Controllers and Regulators · SOIC-8
NCP1252EDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback input. Directly connects to an optocoupler collector. Internally pulled up (~3.5 kΩ) to Vdd; the FB voltage is divided by 3 to form the current setpoint (VILIM = 1 V). Max FB current 1.5 mA. |
| 2 | BO | input | Brown-Out input. Monitors an image of the input bulk voltage via a resistor divider to provide brown-out protection. Threshold VBO = 1 V typ; internal 10 µA hysteresis current source. |
| 3 | CS | input | Current Sense input. Monitors the primary MOSFET current through a sense resistor and sets the ramp-compensation amplitude. Cycle-by-cycle limit VILIM = 1 V; fault threshold FCS = 1 V; 160 ns leading-edge blanking; internal ramp comp Rramp ≈ 26.5 kΩ. |
| 4 | RT | passive | Timing element. A resistor to ground fixes the switching frequency (RT = 43 kΩ → fOSC ≈ 100 kHz; RT = 8.5 kΩ → fOSC ≈ 500 kHz). Frequency is jittered ±5% at 3.33 ms period. |
| 5 | GND | power_in | Controller ground reference pin. |
| 6 | DRV | output | Gate driver output to the external power MOSFET. +500 mA source / -800 mA sink capability; source resistance 10 Ω typ, sink 6 Ω typ; clamped at 15 V typ (max 18 V) to protect the MOSFET gate. |
| 7 | VCC | power_in | Main supply pin. Operating range 8 V to 28 V (30 V transient <10 ms for IVCC<20 mA). For the E version, VCC(on) ≈ 14 V, VCC(off) ≈ 9 V with 5 V hysteresis (auto-recovery UVLO). Max injected current 20 mA. |
| 8 | SSTART | passive | Soft-start pin. A capacitor to ground sets the soft-start duration (charge current ISS = 10 µA typ, VSS = 4 V). The pin is held to ground during the internal start-up delay timer (no delay for E version). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
NCP1252EDR2GNCP1252EDR2GEPG
CAD (KiCad official)
- Symbol:
NCP1252EDR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ncp1252edr2g.step |
122 KB | You want the bare part, or you mark your own boards. |
ncp1252edr2g-etched.step |
2.4 MB | You want the part with NCP1252EDR2G already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 592 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (22 pp, sha256
5eceb5f0fc9b12f2, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).