Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

MC78M05CDTRKG

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DPAK-3

MC78M05CDTRKG from onsemi, in a DPAK-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Input power_in Unregulated positive input supply. Recommended operating range 7.0 V to 25 Vdc for the 5.0 V variant; absolute max 35 Vdc. A ~0.33 uF bypass capacitor is recommended close to the pin when the device is far from the main filter capacitor.
2 Ground power_in Common return / ground reference for both input and output. In the DPAK-3 package the heatsink tab (terminal 4 in the case outline) is internally connected to this pin.
3 Output power_out Regulated +5.0 V output, 500 mA maximum with adequate heatsinking (typical VO 5.0 V, tolerance +/-4% over line/load/temperature for the C grade). Dropout voltage typ 2.0 V. A ~0.1 uF output capacitor is recommended for transient response.
4 Ground (Tab) power_in Heatsink tab on the DPAK-3 package outline. Internally shorted to Pin 2 (Ground); commonly soldered to a copper pour to spread heat.

Key specifications

Parameter Value
Manufacturer onsemi
Package DPAK-3
Category PMIC
Pins 4

Ordering variants

Same part, different packaging or reel option.

  • MC78M05CDTRKG
  • MC78M05CDTRKGDTG
  • MC78M05CDTRKGTG

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage (TJ = 25C) VO 4.8 5 5.2 Vdc VI = 10 V, IO = 350 mA, TJ = 25C (MC78M05B/MC78M05C/NCV78M05B row) 2
Output Voltage Variation VO 4.75 5.25 Vdc 7.0 Vdc ≤ VI ≤ 20 Vdc, 5.0 mA ≤ IO ≤ 350 mA (MC78M05B/MC78M05C/NCV78M05B row) 2
Line Regulation Regline 3 50 mV TJ = 25C, 7.0 Vdc ≤ VI ≤ 25 Vdc, IO = 200 mA 2
Load Regulation Regload 20 100 mV TJ = 25C, 5.0 mA ≤ IO ≤ 500 mA 2
Load Regulation Regload 10 50 mV TJ = 25C, 5.0 mA ≤ IO ≤ 200 mA 2
Input Bias Current IIB 3.2 6 mA TJ = 25C 2
Quiescent Current Change IIB 0.8 mA 8.0 Vdc ≤ VI ≤ 25 Vdc, IO = 200 mA 2
Quiescent Current Change IIB 0.5 mA 5.0 mA ≤ IO ≤ 350 mA 2
Ripple Rejection RR 62 dB IO = 100 mA, f = 120 Hz, 8.0 V ≤ VI ≤ 18 V 2
Ripple Rejection RR 62 80 dB IO = 300 mA, f = 120 Hz, 8.0 V ≤ VI ≤ 18 V, TJ = 25C 2
Output Noise Voltage Vn 40 V TA = 25C, 10 Hz ≤ f ≤ 100 kHz 2
Dropout Voltage VI−VO 2 Vdc TJ = 25C 2
Short Circuit Current Limit IOS 350 mA TJ = 25C, VI = 35 V 2
Average Temperature Coefficient of Output Voltage VO/T 0.2 mV/C IO = 5.0 mA 2
Peak Output Current IO 700 mA TJ = 25C 2
Input Voltage (5.0 V−18 V option) VI 35 Vdc 2
Operating Junction Temperature Range TJ 150 C 2
Storage Temperature Range Tstg -65 150 C 2
Thermal Resistance, Junction-to-Air (DPAK-3, DT Suffix) θJA 92 C/W DT Suffix plastic package 2
Thermal Resistance, Junction-to-Case (DPAK-3, DT Suffix) θJC 5 C/W DT Suffix plastic package 2
Operating Junction Temperature Range (MC78M05C) TJ 0 125 C Tlow = 0C to Thigh = +125C for MC78M05C (ordering information: TJ = 0 to +125C) 10

CAD (KiCad official)

  • Symbol: MC78M05CDTRKG
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK-3 (KiCad packages3D, STEP)
  • 3D model files: mc78m05cdtrkg-etched.step / mc78m05cdtrkg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc78m05cdtrkg.step / mc78m05cdtrkg.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
mc78m05cdtrkg.step 119 KB You want the bare part, or you mark your own boards.
mc78m05cdtrkg-etched.step 2.1 MB You want the part with MC78M05CDTRKG already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 538 faces against 83 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (15 pp, sha256 4ae6cd4978cb4cd9, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF