Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

MC74HC132ADR2G

onsemi · Gates · SOIC-14

MC74HC132ADR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Gate 1 Schmitt-trigger input A. Positive-going threshold VT+ typ 2.9 V and negative-going threshold VT- typ 1.9 V at VCC=4.5 V; input leakage 1.0 uA max.
2 B1 input Gate 1 Schmitt-trigger input B. Schmitt-trigger CMOS input, hysteresis typ 0.9 V at VCC=4.5 V; compatible with CMOS/NMOS/LSTTL outputs (with pull-up for LSTTL).
3 Y1 output Gate 1 NAND output, Y1 = NOT(A1 AND B1). Push-pull CMOS output, drives 10 LSTTL loads; IOUT up to 4.0 mA at VCC=4.5 V with VOH >= 3.98 V and VOL <= 0.26 V.
4 A2 input Gate 2 Schmitt-trigger input A. Same Schmitt-trigger characteristics as A1; must not be left floating (tie to VCC or GND if unused).
5 B2 input Gate 2 Schmitt-trigger input B. Schmitt-trigger CMOS input, hysteresis typ 0.9 V at VCC=4.5 V.
6 Y2 output Gate 2 NAND output, Y2 = NOT(A2 AND B2). Propagation delay tPD typ ~25 ns at VCC=4.5 V, CL=50 pF.
7 GND power_in Ground / 0 V reference for the device. Maximum DC ground current 75 mA per pin.
8 Y3 output Gate 3 NAND output, Y3 = NOT(A3 AND B3). CMOS push-pull output.
9 A3 input Gate 3 Schmitt-trigger input A. Schmitt-trigger CMOS input.
10 B3 input Gate 3 Schmitt-trigger input B. Schmitt-trigger CMOS input.
11 Y4 output Gate 4 NAND output, Y4 = NOT(A4 AND B4). CMOS push-pull output; drives 10 LSTTL loads.
12 A4 input Gate 4 Schmitt-trigger input A. Schmitt-trigger CMOS input.
13 B4 input Gate 4 Schmitt-trigger input B. Schmitt-trigger CMOS input.
14 VCC power_in Positive supply, 2.0 to 6.0 V recommended (absolute max 7.0 V). Quiescent supply current ICC typ 1.0 uA at 25 degC.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • MC74HC132ADR2GDG
  • MC74HC132ADR2G
  • MC74HC132ADR2GDTG
  • MC74HC132ADR2GDTR2G
  • MC74HC132ADR2GNG

CAD (KiCad official)

  • Symbol: MC74HC132ADR2G
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (9 pp, sha256 0930a7c2aa9ab780, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF