MC14538BDR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	C_X_A	passive	Timing capacitor connection for monostable A. External timing capacitor Cx connects between this pin (C_X) and R_X/C_X.
2	R_X/C_X_A	passive	Timing resistor/capacitor common node for monostable A. External timing resistor Rx connects between VDD and this pin; timing capacitor Cx connects between this pin and C_X.
3	RESET_A	input	Active-low reset input for monostable A. A low level forces Q low and Q-bar high independent of the input trigger state.
4	A_A	input	Trigger input A of monostable A (leading-edge / negative-transition trigger input). Triggers the one-shot on the falling edge when B is high and Reset is high.
5	B_A	input	Trigger input B of monostable A (trailing-edge / positive-transition trigger input). Triggers the one-shot on the rising edge when A is low and Reset is high.
6	Q_A	output	True output of monostable A. Goes high for the programmed pulse width Tx ≈ RxCx after a valid trigger.
7	Q_A_BAR	output	Complement (inverted) output of monostable A. Goes low for the programmed pulse width after a valid trigger.
8	VSS	power_in	Negative supply / ground reference (0 V). Supply range VDD-VSS = 3.0 to 18 V.
9	Q_B_BAR	output	Complement (inverted) output of monostable B. Goes low for the programmed pulse width after a valid trigger.
10	Q_B	output	True output of monostable B. Goes high for the programmed pulse width Tx ≈ RxCx after a valid trigger.
11	B_B	input	Trigger input B of monostable B (trailing-edge / positive-transition trigger input). Triggers the one-shot on the rising edge when A is low and Reset is high.
12	A_B	input	Trigger input A of monostable B (leading-edge / negative-transition trigger input). Triggers the one-shot on the falling edge when B is high and Reset is high.
13	RESET_B	input	Active-low reset input for monostable B. A low level forces Q low and Q-bar high independent of the input trigger state.
14	R_X/C_X_B	passive	Timing resistor/capacitor common node for monostable B. External Rx connects between VDD and this pin; external Cx connects between this pin and C_X.
15	C_X_B	passive	Timing capacitor connection for monostable B. External Cx connects between this pin and R_X/C_X.
16	VDD	power_in	Positive supply voltage. Operating range 3.0 V to 18 V (VDD referenced to VSS).

Key specifications

Parameter	Value
Manufacturer	onsemi
Package	SOIC-16
Category	Logic
Pins	16

Ordering variants

Same part, different packaging or reel option.

MC14538BDR2G
MC14538BDR2GDG
MC14538BDR2GPG
MC14538BDR2GDTR2G
MC14538BDR2GDTG

CAD (KiCad official)

Symbol: MC14538BDR2G
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`mc14538bdr2g.step`	217 KB	You want the bare part, or you mark your own boards.
`mc14538bdr2g-etched.step`	3.1 MB	You want the part with `MC14538BDR2G` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 766 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: onsemi datasheet (13 pp, sha256 84c2dbf8f6667537, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF