MC14052BDR2G
Public Unreviewedby Ray
onsemi Analog Switches, Multiplexers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdownMC14052BDR2G
onsemi · Analog Switches, Multiplexers · SOIC-16
MC14052BDR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Y0 | bidirectional | Analog switch I/O for Y-bank channel 0. Selected to common Y when A=0, B=0 and INH=0. Signal must be between VEE and VDD; typical Ron ~120 Ω at VDD-VEE=10 V. |
| 2 | Y2 | bidirectional | Analog switch I/O for Y-bank channel 2. Selected to common Y when A=0, B=1 and INH=0. |
| 3 | Y | bidirectional | Common analog I/O for the Y switch bank (DP4T Y-common). Connects to Y0..Y3 based on A/B select and INH state. |
| 4 | Y3 | bidirectional | Analog switch I/O for Y-bank channel 3. Selected to common Y when A=1, B=1 and INH=0. |
| 5 | Y1 | bidirectional | Analog switch I/O for Y-bank channel 1. Selected to common Y when A=1, B=0 and INH=0. |
| 6 | INH | input | Inhibit (enable) control input, referenced to VSS. When INH=1 all switches are OFF (high impedance); when INH=0 the A/B select determines which channel is active. VIH ≥ 3.5 V, VIL ≤ 1.5 V at VDD=5 V. |
| 7 | VEE | power_in | Negative analog supply. Sets the lower limit of the analog switch signal range. Must satisfy VEE ≤ VSS; absolute maximum VDD − VEE = 18 V (recommended 15 V). |
| 8 | VSS | power_in | Digital/control ground reference. Control inputs (A, B, INH) are referenced to VSS. Typically tied to 0 V. |
| 9 | B | input | Digital select input B (MSB of the 2-bit channel address), referenced to VSS. Combined with A to pick one of four channels per bank when INH=0. |
| 10 | A | input | Digital select input A (LSB of the 2-bit channel address), referenced to VSS. Combined with B to pick one of four channels per bank when INH=0. |
| 11 | X3 | bidirectional | Analog switch I/O for X-bank channel 3. Selected to common X when A=1, B=1 and INH=0. |
| 12 | X0 | bidirectional | Analog switch I/O for X-bank channel 0. Selected to common X when A=0, B=0 and INH=0. |
| 13 | X | bidirectional | Common analog I/O for the X switch bank (DP4T X-common). Connects to X0..X3 based on A/B select and INH state. |
| 14 | X1 | bidirectional | Analog switch I/O for X-bank channel 1. Selected to common X when A=1, B=0 and INH=0. |
| 15 | X2 | bidirectional | Analog switch I/O for X-bank channel 2. Selected to common X when A=0, B=1 and INH=0. |
| 16 | VDD | power_in | Positive supply and control-input logic-high reference. Recommended 3.0 to 18 V relative to VEE; absolute maximum VDD − VEE = 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Interface |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
MC14052BDGMC14052BDR2GMC14052BDR2GNLV14052BDGMC14052BDR2GNLV14052BDR2GMC14052BDTR2GMC14052BDR2GNLV14052BDTR2G
CAD (KiCad official)
- Symbol:
MC14052BDR2G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
mc14052bdr2g.step |
217 KB | You want the bare part, or you mark your own boards. |
mc14052bdr2g-etched.step |
3.0 MB | You want the part with MC14052BDR2G already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 736 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (11 pp, sha256
b980ba9c7a734408, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).