MC14013BDTR2G from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	QA	output	Flip-flop A true output (Q). CMOS push-pull output; drives two low-power TTL loads or one LS-TTL load over rated temperature range.
2	QA_N	output	Flip-flop A complementary output (Q-bar). CMOS push-pull output; always the logical inverse of QA except in the Set=Reset=1 override condition.
3	CA	input	Flip-flop A Clock input. Data is transferred from D to Q on the positive-going edge of the clock pulse. CMOS input with diode protection.
4	RA	input	Flip-flop A Direct Reset input (active high, asynchronous). When high, forces QA=0 and QA_N=1 independent of clock and data.
5	DA	input	Flip-flop A Data input. Sampled on the positive-going edge of CA and transferred to QA. Setup/hold times of ~40 ns at VDD=5 V.
6	SA	input	Flip-flop A Direct Set input (active high, asynchronous). When high, forces QA=1 and QA_N=0 independent of clock and data.
7	VSS	power_in	Negative supply / ground reference. All input and output voltages are referenced to VSS. Typically tied to 0 V.
8	SB	input	Flip-flop B Direct Set input (active high, asynchronous). When high, forces QB=1 and QB_N=0 independent of clock and data.
9	DB	input	Flip-flop B Data input. Sampled on the positive-going edge of CB and transferred to QB.
10	RB	input	Flip-flop B Direct Reset input (active high, asynchronous). When high, forces QB=0 and QB_N=1 independent of clock and data.
11	CB	input	Flip-flop B Clock input. Data is transferred from D to Q on the positive-going edge of the clock pulse.
12	QB_N	output	Flip-flop B complementary output (Q-bar). CMOS push-pull output; logical inverse of QB except in the Set=Reset=1 override condition.
13	QB	output	Flip-flop B true output (Q). CMOS push-pull output; drives two low-power TTL loads or one LS-TTL load over rated temperature range.
14	VDD	power_in	Positive supply voltage. Rated range 3.0 to 18 Vdc (absolute max 18 V). Bypass with a ceramic capacitor to VSS close to the pin.

Key specifications

Parameter	Value
Manufacturer	onsemi
Package	TSSOP-14
Category	Logic
Pins	14

Ordering variants

Same part, different packaging or reel option.

MC14013BDTR2G
MC14013BDTR2GNLV14013BDTR2G
MC14013BDTR2GDG
MC14013BDTR2GDR2G
MC14013BDTR2GNLV14013BDG
MC14013BDTR2GNLV14013BDR2G
MC14013BDTR2GFG
MC14013BDTR2GFELG

CAD (KiCad official)

Symbol: MC14013BDTR2G
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`mc14013bdtr2g.step`	194 KB	You want the bare part, or you mark your own boards.
`mc14013bdtr2g-etched.step`	2.9 MB	You want the part with `MC14013BDTR2G` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 723 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: onsemi datasheet (8 pp, sha256 d026165b363be4d9, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF