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Contents

README

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LNK562DN-TL

POWER INTEGRATIONS · AC-DC Controllers and Regulators · SO-7

LNK562DN-TL from POWER INTEGRATIONS, in a SO-7. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BP power_in BYPASS pin. Connection for an external 0.1 µF bypass capacitor for the internally generated 5.8 V supply. Also monitored by an undervoltage comparator that disables the power MOSFET when the pin drops below 4.85 V, and clamped by an internal 6.3 V shunt regulator to allow external biasing.
2 FB input FEEDBACK pin. Simple ON/OFF control input; the internal power MOSFET is disabled for the next switching cycle when the current into this pin exceeds ~70 µA (low logic level, threshold ~1.69 V). Sampled at the rising edge of the internal clock; below 0.8 V drives auto-restart.
4 D power_in DRAIN pin. High-voltage drain connection of the internal 700 V power MOSFET. Also provides the internal high-voltage current source used to start up and charge the BYPASS capacitor and to run the controller in steady state (when the MOSFET is off).
5 S power_in SOURCE pin. Power MOSFET source connection and ground reference for the BYPASS and FEEDBACK pins. Multiple SOURCE pins are internally tied together and are intended to be soldered to a sufficient copper area to keep the SOURCE pin temperature at or below 100 °C.
6 S power_in SOURCE pin (bonded to pin 5). Power MOSFET source / ground reference; connect to primary return and use for thermal spreading.
7 S power_in SOURCE pin (bonded to pin 5). Power MOSFET source / ground reference; connect to primary return and use for thermal spreading.
8 S power_in SOURCE pin (bonded to pin 5). Power MOSFET source / ground reference; connect to primary return and use for thermal spreading.

Key specifications

Parameter Value
Manufacturer POWER INTEGRATIONS
Package SO-7
Category PMIC
Pins 7

Ordering variants

Same part, different packaging or reel option.

  • LNK562DN-TL
  • LNK562DN-TLDG-TL
  • LNK562DN-TLPN
  • LNK562DN-TLP
  • LNK562DN-TLGN
  • LNK562DN-TLG

CAD (KiCad official)

  • Symbol: LNK562DN-TL
  • Footprint: Package_SO:TI_SO-PowerPAD-8
  • 3D model: SO-7 (KiCad packages3D, STEP)
  • 3D model files: lnk562dn-tl-etched.step / lnk562dn-tl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lnk562dn-tl.step / lnk562dn-tl.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lnk562dn-tl.step 123 KB You want the bare part, or you mark your own boards.
lnk562dn-tl-etched.step 1.7 MB You want the part with LNK562DN-TL already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 442 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: POWER INTEGRATIONS datasheet (16 pp, sha256 e713b28f0268abba, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF