LMR14030SDDAR from Texas Instruments, in a SO-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BOOT	passive	Bootstrap capacitor connection for the high-side MOSFET driver. Connect a high-quality 0.1 µF capacitor from BOOT to SW. Absolute max 49 V to GND, 6.5 V to SW.
2	VIN	power_in	Power supply input, 4 V to 40 V recommended (44 V abs max). Connect bypass capacitor C_IN as close as possible between VIN and GND.
3	EN	input	Precision enable input with internal pull-up current source. Pull below 1.2 V (typ) to disable; float or connect to VIN to enable. Can be used with a resistor divider to set input UVLO. EN threshold 1.05-1.38 V.
4	RT/SYNC	bidirectional	Resistor timing / external clock synchronization input. An internal amplifier holds this pin at a fixed voltage; an external resistor to GND sets switching frequency (200 kHz-2.5 MHz). Pulling above the PLL threshold switches the pin to a high-impedance sync clock input (250 kHz-2.3 MHz). Abs max 3.6 V.
5	FB	input	Feedback input pin. Connect to the output feedback divider to set V_OUT. Reference V_FB = 0.750 V typ. Do not short to ground during operation. Abs max 7 V.
6	SS	passive	Soft-start control pin. Connect a capacitor from SS to GND to program the soft-start ramp time. Internal charge current 3 µA typ. Abs max 5 V.
7	GND	power_in	System ground pin. Return for VIN bypass and all control circuitry.
8	SW	power_out	Switching output of the regulator, internally connected to the high-side power MOSFET drain. Connect to the power inductor and catch/Schottky diode. Recommended range -1 V to 40 V (abs max -3 V to 44 V).
9	PAD	power_in	Exposed thermal pad on the package bottom. Major heat-dissipation path of the die; must be soldered to the PCB ground plane for proper thermal performance.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SO-8-EP
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

LMR14030SDDAR

CAD (KiCad official)

Symbol: LMR14030SDDAR
Footprint: Package_SO:TI_SO-PowerPAD-8
3D model: SO-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`lmr14030sddar.step`	123 KB	You want the bare part, or you mark your own boards.
`lmr14030sddar-etched.step`	2.6 MB	You want the part with `LMR14030SDDAR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 652 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (30 pp, sha256 86735f604f09329c, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF