component

LD1117S33CTR

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-4. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpmicld1117s33ctr
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

LD1117S33CTR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-4

LD1117S33CTR from STMicroelectronics, in a SOT-223-4. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground / common reference. Also carries the internal adjust/reference return current.
2 VOUT power_out Regulated 3.3 V output, up to 800 mA. Requires a minimum 10 µF capacitor to ground for stability. The exposed SOT-223 tab is internally connected to this pin.
3 VIN power_in Unregulated input supply. Absolute max 15 V DC (18 V when IOUT < 20 mA). A 100 nF input capacitor is recommended near the pin.
4 TAB passive SOT-223 heat-sink tab, internally tied to VOUT. Solder to a copper pour for thermal dissipation; the pour is at VOUT potential.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-223-4
Category PMIC
Pins 4

Ordering variants

Same part, different packaging or reel option.

  • LD1117S33CTR
  • LD1117S33CTRV33
  • LD1117S33CTRV33C
  • LD1117S33CTRDT33
  • LD1117S33CTRDT33TR
  • LD1117S33CTRD33
  • LD1117S33CTRD33TR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage (VIN=5.3 V, IO=10 mA, TJ=25 °C) VO 3.24 3.3 3.36 V Vin = 5.3 V, IO = 10 mA, TJ = 25 °C 18
Output voltage (full load and line range) VO 3.16 3.44 V IO = 0 to 800 mA, Vin = 4.75 to 10 V 18
Line regulation ΔVO 1 30 mV Vin = 4.75 to 15 V, IO = 0 mA 18
Load regulation ΔVO 1 30 mV Vin = 4.75 V, IO = 0 to 800 mA 18
Operating input voltage Vin 15 V IO = 100 mA 18
Quiescent current Id 5 10 mA Vin ≤ 15 V 18
Output current IO 800 950 1300 mA Vin = 8.3 V, TJ = 25 °C 18
Supply voltage rejection SVR 60 75 dB IO = 40 mA, f = 120 Hz, TJ = 25 °C, Vin = 6.3 V, Vripple = 1 VPP 18
Dropout voltage Vd 1 1.1 V IO = 100 mA, TJ = 0 to 125 °C 18
Dropout voltage Vd 1.05 1.15 V IO = 500 mA, TJ = 0 to 125 °C 18
Dropout voltage Vd 1.1 1.2 V IO = 800 mA, TJ = 0 to 125 °C 18
Dropout voltage Vd 1.1 V IO = 100 mA 18
Dropout voltage Vd 1.2 V IO = 500 mA 18
Dropout voltage Vd 1.3 V IO = 800 mA 18
Temperature stability ΔVO 0.5 % 18
Long term stability ΔVO 0.3 % 1000 hrs, TJ = 125 °C 18
Thermal regulation 0.01 0.1 %/W Ta = 25 °C, 30 ms Pulse 18
DC input voltage VIN 15 V 7
DC input voltage (footnote 1) VIN 18 V IOUT lower than 20 mA 7
Power dissipation PTOT 12 W 7
Storage temperature range TSTG -40 150 °C 7
Operating junction temperature range (C version) TOP -40 125 °C for C version 7
Thermal resistance junction-case (SOT-223) RthJC 15 °C/W SOT-223 7
Thermal resistance junction-ambient (SOT-223) RthJA 110 °C/W SOT-223 7

CAD (KiCad official)

  • Symbol: LD1117S33CTR
  • Footprint: Package_TO_SOT_SMD:SOT-223
  • 3D model: SOT-223-4 (KiCad packages3D, STEP)
  • 3D model files: ld1117s33ctr-etched.step / ld1117s33ctr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ld1117s33ctr.step / ld1117s33ctr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ld1117s33ctr.step 64 KB You want the bare part, or you mark your own boards.
ld1117s33ctr-etched.step 2.0 MB You want the part with LD1117S33CTR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 495 faces against 75 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (44 pp, sha256 1b80923ec6ca9161, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF