L78L05ABD13TR
Public Unreviewedby Ray
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownL78L05ABD13TR
STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
L78L05ABD13TR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated 5 V output (4.6 V min / 5.4 V max at TJ=25 °C). Up to 100 mA with adequate heat-sinking. Recommend 0.1 µF ceramic to GND for stability. |
| 2 | GND | power_in | Ground reference. On the SO-8 package pins 2, 3, 6 and 7 are internally commoned to the die attach flag to lower thermal resistance; tie all four to the ground plane for best heat spreading. |
| 3 | GND | power_in | Ground reference. Internally commoned with pins 2, 6 and 7 to the die attach flag for thermal spreading; connect all four to the ground plane. |
| 4 | NC | unconnected | Not connected. Leave floating or tie to ground; no internal bond. |
| 5 | NC | unconnected | Not connected. Leave floating or tie to ground; no internal bond. |
| 6 | GND | power_in | Ground reference. Internally commoned with pins 2, 3 and 7 to the die attach flag for thermal spreading; connect all four to the ground plane. |
| 7 | GND | power_in | Ground reference. Internally commoned with pins 2, 3 and 6 to the die attach flag for thermal spreading; connect all four to the ground plane. |
| 8 | VIN | power_in | Unregulated DC input. Absolute maximum 30 V for the 5 V output variant; typical dropout ~2 V so VIN ≥ ~7 V for full 5 V regulation. Recommend 0.33 µF ceramic to GND close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
L78L05ABD13TRDL78L05ABD13TRL78L05ABD13TRZL78L05ABD13TRAPL78L05ABD13TRZAP
CAD (KiCad official)
- Symbol:
L78L05ABD13TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
l78l05abd13tr.step |
122 KB | You want the bare part, or you mark your own boards. |
l78l05abd13tr-etched.step |
2.5 MB | You want the part with L78L05ABD13TR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 617 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (45 pp, sha256
43922ae159face7e, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).