L7815CD2T-TR
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, D2PAK. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownL7815CD2T-TR
STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · D2PAK
L7815CD2T-TR from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INPUT | power_in | Unregulated positive supply input (Vi). Absolute maximum 35 V for the 15 V version; typical operating range ≈17 V to 30 V. Recommend a 0.33 µF bypass capacitor from INPUT to GND close to the device. |
| 2 | GROUND | power_in | Common ground / return pin. Electrically connected to the D²PAK metal tab, which serves as the primary thermal path (RthJC ≈ 3 °C/W). |
| 3 | OUTPUT | power_out | Regulated +15 V output (Vo, tolerance ±4 % standard, ±2 % on A-grade). Delivers up to 1.5 A with adequate heat-sinking. Recommend a 0.1 µF output bypass capacitor to improve transient response. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | D2PAK |
| Category | PMIC |
| Pins | 3 |
Ordering variants
Same part, different packaging or reel option.
L7815CD2T-TRL7815CD2T-TRCVL7815CD2T-TRACVL7815CD2T-TRCPL7815CD2T-TRACPL7815CD2T-TRCDT-TRL7815CD2T-TRCDT
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (TJ = 25 °C) | VO | 14.4 | 15 | 15.6 | V | TJ = 25 °C | 19 |
| Output voltage (IO = 5 mA to 1 A) | VO | 14.25 | 15 | 15.75 | V | IO = 5 mA to 1 A, VI = 17.5 to 28 V | 19 |
| Output voltage (IO = 1 A, TJ = 25 °C) | VO | 14.25 | 15 | 15.75 | V | IO = 1 A, VI = 28 to 30 V, TJ = 25 °C | 19 |
| Line regulation | ΔVO | 300 | mV | VI = 17.5 to 30 V, TJ = 25 °C | 19 | ||
| Line regulation | ΔVO | 150 | mV | VI = 20 to 26 V, TJ = 25 °C | 19 | ||
| Load regulation | ΔVO | 300 | mV | IO = 5 mA to 1.5 A, TJ = 25 °C | 19 | ||
| Load regulation | ΔVO | 150 | mV | IO = 250 to 750 mA, TJ = 25 °C | 19 | ||
| Quiescent current | Id | 8 | mA | TJ = 25 °C | 19 | ||
| Quiescent current change | ΔId | 0.5 | mA | IO = 5 mA to 1 A | 19 | ||
| Quiescent current change | ΔId | 1 | mA | VI = 17.5 to 30 V | 19 | ||
| Output voltage drift | ΔVO/ΔT | -1 | mV/°C | IO = 5 mA | 19 | ||
| Output noise voltage | eN | 90 | µV/VO | B = 10 Hz to 100 kHz, TJ = 25 °C | 19 | ||
| Supply voltage rejection | SVR | 54 | dB | VI = 18.5 to 28.5 V, f = 120 Hz | 19 | ||
| Dropout voltage | Vd | 2 | V | IO = 1 A, TJ = 25 °C | 19 | ||
| Output resistance | RO | 19 | mΩ | f = 1 kHz | 19 | ||
| Short circuit current | Isc | 0.23 | A | VI = 35 V, TJ = 25 °C | 19 | ||
| Short circuit peak current | Iscp | 2.2 | A | TJ = 25 °C | 19 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 4 | ||
| DC input voltage | VI | 35 | V | for VO = 5 to 18 V | 4 | ||
| Operating junction temperature range | TOP | 0 | 125 | °C | for L78xxC, L78xxAC | 4 | |
| Thermal resistance junction-case (D2PAK) | RthJC | 3 | °C/W | D2PAK | 4 | ||
| Thermal resistance junction-ambient (D2PAK) | RthJA | 62.5 | °C/W | D2PAK | 4 |
CAD (KiCad official)
- Symbol:
L7815CD2T-TR - Footprint:
Package_TO_SOT_SMD:TO-263-2 - 3D model: D2PAK (KiCad packages3D, STEP)
- 3D model files:
l7815cd2t-tr-etched.step/l7815cd2t-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);l7815cd2t-tr.step/l7815cd2t-tr.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
l7815cd2t-tr.step |
108 KB | You want the bare part, or you mark your own boards. |
l7815cd2t-tr-etched.step |
1.8 MB | You want the part with L7815CD2T-TR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 465 faces against 79 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (55 pp, sha256
f7b390b5c05e0aba, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).