KA3525A from Minos, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Inv. Input	input	Error amplifier inverting input. Compared against the non-inverting input (pin 2) to generate the PWM control voltage. Common-mode range approximately +1.5 V to +5.2 V.
2	Noninv. Input	input	Error amplifier non-inverting input. Typically tied to a resistor divider from Vref (pin 16) to set the regulation setpoint.
3	Sync	input	Oscillator sync input. Allows an external clock to synchronize the internal oscillator. Sync threshold typically 2.0 V (1.2 V min, 2.8 V max), sync input current ~1.0 mA at 3.5 V.
4	OSC. Output	output	Oscillator output. Provides the internal system clock (typical 3.0-3.5 V amplitude, 0.3-1.0 μs pulse width) useful for synchronizing additional KA3525A devices or external logic.
5	CT	passive	Timing capacitor connection. Together with RT (pin 6) sets the oscillator frequency. Range 0.001 μF to 0.2 μF for 100 Hz to 400 kHz operation.
6	RT	passive	Timing resistor connection to ground. Sets the oscillator charging current together with CT. Range 2.0 kΩ to 150 kΩ.
7	Discharge	passive	Discharge / dead-time adjust pin. An external resistor from CT (pin 5) to this pin sets the dead-time between the two outputs. Dead-time resistor RD range 0 to 500 Ω.
8	Soft-Start	passive	Soft-start capacitor. An internal ~50 μA current source (Vshutdown=0 V, typ 50 μA, min 25 μA, max 80 μA) charges an external capacitor to gradually increase the PWM duty cycle from zero at power-up.
9	Compensation	output	Error amplifier output and PWM comparator input. External RC compensation network is applied here to shape the loop response. PWM input threshold ranges from ~0.9 V (zero duty) to ~3.3 V (max duty).
10	Shut-down	input	Shutdown / standby input. Pulling this pin high inhibits the outputs and discharges the soft-start capacitor; at Vshutdown=2.5 V input current is ~0.4 mA.
11	Output A	output	Totem-pole output A. Alternates with Output B (pin 14) to drive an external power stage. ±100 mA continuous, ±400 mA peak. Max duty cycle per output ~49%.
12	Ground	power_in	Signal and power ground return for the device.
13	Vc	power_in	Output stage collector supply. Powers the totem-pole output drivers separately from VCC. Recommended 4.5 V to 35 V, absolute max +40 V.
14	Output B	output	Totem-pole output B. Alternates with Output A (pin 11) at half the oscillator frequency. ±100 mA continuous, ±400 mA peak. Rise time typ 100 ns, fall time typ 50 ns into 1 nF load.
15	VCC	power_in	Main IC supply voltage. Recommended 8.0 V to 35 V (absolute max +40 V). Undervoltage lockout trips at approximately 7.0 V typical. ICC typ 14 mA.
16	Vref	power_out	5.1 V ±1% precision reference output. Sourcing up to 20 mA (50 mA absolute max). Typically bypassed with 0.1 μF and used to bias the error-amplifier divider and external timing network.

Key specifications

Parameter	Value
Manufacturer	Minos
Package	DIP-16
Category	PMIC
Pins	16

CAD (KiCad official)

Symbol: KA3525A
Footprint: Package_DIP:DIP-16_W7.62mm
3D model: DIP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`ka3525a.step`	505 KB	You want the bare part, or you mark your own boards.
`ka3525a-etched.step`	2.1 MB	You want the part with `KA3525A` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 528 faces against 284 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Minos datasheet (7 pp, sha256 4098c17ca88f179c, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF