JSM4056 from JSMSEMI, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TS	input	Battery temperature sense/protection input. Connect an external NTC thermistor and resistor divider to set the battery temperature protection window. Internally compared against OTPH (45% x VCC) and OTPL (80% x VCC) thresholds; charging is suspended when VTS is outside this range. Tie to GND to disable the temperature protection function.
2	PROG	passive	Charge current program pin. Connect a resistor RPROG from PROG to GND to set the constant charge current per IBAT = 1000 V / RPROG (RPROG >= 0.8 kOhm). Pin voltage is regulated to 1.0 V in constant-current mode and 0.1 V in trickle-charge mode; C/10 termination is detected via this pin.
3	GND	power_in	Device ground / power return.
4	VCC	power_in	Charger positive supply input (4.5 V typ 5 V, max 5.5 V absolute max 8 V). Powers all internal circuitry. Charging begins when VCC exceeds the UVLO threshold (typ 3.73 V) AND VCC > VBAT + 144 mV; if VCC-VBAT falls below 94 mV the part enters low-power shutdown (IBAT < 3 uA). Decouple with a 2.2 uF ceramic capacitor to GND.
5	VBAT	power_out	Battery positive terminal / charge current output. Delivers up to 1000 mA of charge current and regulates the float voltage to 4.2 V (+/-1%). In standby or with VCC removed, BAT leakage is < 3 uA (typ 1 uA). Automatic recharge starts when VBAT falls below VFLOAT - 210 mV.
6	STDBY	output	Charge-complete status indicator, open-drain output. Pulled low (VOL ~ 0.3 V at 5 mA) when the charge cycle has terminated to light an external LED; high-impedance during an active charge cycle.
7	CHRG	output	Charge status indicator, open-drain output. Pulled low (VOL ~ 0.3 V at 5 mA) while the battery is being charged; goes high-impedance when charging completes. If charger is inserted with no battery attached the LED will blink to indicate the fault.
8	CE	input	Chip enable input (absolute max -0.3 to 8 V). Tie to VCC or leave floating for normal operation; tie to GND to shut the chip down.

Key specifications

Parameter	Value
Manufacturer	JSMSEMI
Package	ESOP-8
Category	PMIC
Pins	8

CAD (KiCad official)

Symbol: JSM4056
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
3D model: ESOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`jsm4056.step`	193 KB	You want the bare part, or you mark your own boards.
`jsm4056-etched.step`	1.5 MB	You want the part with `JSM4056` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 370 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: JSMSEMI datasheet (8 pp, sha256 4c75700de81934b6, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF