IP2312-4V35 from INJOINIC, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	D1	output	LED drive pin / battery-type select pin (IP2312_VSET). Drives an LED indicator (3-10 mA) and, on VSET variants, sets the target charge voltage via an external pull-down resistor (NC=4.2V, 43k=4.3V, 75k=4.35V, 100k=4.4V).
2	TEST	passive	Test pin. Connect through a 1kΩ resistor to the battery positive terminal (VBAT).
3	D2	output	LED drive pin. Drives the second (charge-complete) status LED at 3-10 mA typical.
4	NTC	input	NTC temperature-protection input. Sources 20 μA out to an external NTC thermistor to ground; internal comparators trip at VH=0.56V (over-temp), VM=0.60V (warn, reduces current by half), and VL=1.32V (under-temp). Connect a 51kΩ resistor to GND if unused (do not float).
5	BAT	power_out	Battery positive-terminal connection. Buck-converter output to the Li-ion cell; charge termination voltage 4.35V (-4V35 variant), up to 3A charge current. Absolute max 6.5V (9V for <10 μs).
6	ICHG	passive	Charge-current setting pin. External resistor RICHG to GND programs the constant-current charge level: ICC = 135000 / RICHG (e.g. 135kΩ→1A, 91kΩ→1.5A, 45kΩ→3A). Max useful RICHG = 170kΩ; leaving NC defaults to 2.1A.
7	SW	output	DC-DC switching node. Connects to the external buck inductor (typ. 1 μH). Absolute max 6.5V (9V for <10 μs) with integrated PMOS (35 mΩ) and NMOS (30 mΩ) power switches operating at 750 kHz.
8	VIN	power_in	5V charge input from adapter/USB. Recommended 4.5-5.5V, absolute max 6.5V (9V for <10 μs). Integrated UVLO at 4.5V and OVP at 5.6V; input current auto-adjusts to keep adapter from collapsing.
9	EPAD	power_in	Exposed thermal pad on package underside. Ground (GND) connection; must be soldered to the PCB ground plane for thermal dissipation (θJA = 60 °C/W).

Key specifications

Parameter	Value
Manufacturer	INJOINIC
Package	ESOP-8
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

IP2312-4V35

CAD (KiCad official)

Symbol: IP2312-4V35
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
3D model: ESOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`ip2312-4v35.step`	193 KB	You want the bare part, or you mark your own boards.
`ip2312-4v35-etched.step`	1.8 MB	You want the part with `IP2312-4V35` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 470 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: INJOINIC datasheet (11 pp, sha256 37609e8a8c4601a0, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF