HGA1050M from HGSEMI, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TXD	input	Transmit data input from the CAN controller. Logic low drives the bus dominant; logic high leaves it recessive. Internally pulled up to VCC so the pin defaults to recessive when unused. Input levels compatible with 3.3 V and 5 V logic (VIH >= 2 V, VIL <= 0.8 V).
2	GND	power_in	Device ground reference. Connect to the system 0 V rail.
3	VCC	power_in	Supply voltage input. Operating range 4.75 V to 5.25 V (absolute max -0.3 V to 6 V). Decouple locally with a bypass capacitor to GND.
4	RXD	output	Receive data output to the CAN controller. Reports the differential bus state: low when bus is dominant, high when bus is recessive. In standby mode this pin indicates a detected wake-up request when low.
5	SPLIT	output	Common-mode stabilization output. Active only in normal mode, delivering a 0.5 x VCC reference (typ.) used to bias the center tap of a split termination network for improved EMC. Floats (high impedance) in standby mode. Withstands -27 V to +40 V DC on the pin.
6	CANL	bidirectional	Low-side CAN bus line. Driven to ~1.4 V typical in the dominant state and biased toward 0.5 x VCC when recessive. Withstands -27 V to +40 V DC and ISO 7637 transients up to +/-200 V; +/-6 kV HBM ESD protection.
7	CANH	bidirectional	High-side CAN bus line. Driven to ~3.6 V typical in the dominant state and biased toward 0.5 x VCC when recessive. Withstands -27 V to +40 V DC and ISO 7637 transients up to +/-200 V; +/-6 kV HBM ESD protection.
8	STB	input	Standby mode control input. Low = normal mode (transmitter and receiver active); High = standby mode (transmitter disabled, low-power differential receiver monitors the bus for wake-up). Internally pulled up to VCC so the device defaults to standby when unused. Compatible with 3.3 V and 5 V logic.

Key specifications

Parameter	Value
Manufacturer	HGSEMI
Package	SOIC-8
Category	Interface
Pins	8

Ordering variants

Same part, different packaging or reel option.

HGA1050M/TR
HGA1050MM/TR

CAD (KiCad official)

Symbol: HGA1050M
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`hga1050m.step`	122 KB	You want the bare part, or you mark your own boards.
`hga1050m-etched.step`	1.7 MB	You want the part with `HGA1050M` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 442 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HGSEMI datasheet (11 pp, sha256 97adb8c432a42d54, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF