HEF4017BT from Nexperia, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Q5	output	Decoded active-HIGH output 5. HIGH for one clock period when the internal counter is in state 5.
2	Q1	output	Decoded active-HIGH output 1. HIGH for one clock period when the counter is in state 1.
3	Q0	output	Decoded active-HIGH output 0. HIGH for one clock period when the counter is in state 0 (also the state after master reset).
4	Q2	output	Decoded active-HIGH output 2.
5	Q6	output	Decoded active-HIGH output 6.
6	Q7	output	Decoded active-HIGH output 7.
7	Q3	output	Decoded active-HIGH output 3.
8	VSS	power_in	Ground supply reference (0 V).
9	Q8	output	Decoded active-HIGH output 8.
10	Q4	output	Decoded active-HIGH output 4.
11	Q9	output	Decoded active-HIGH output 9. HIGH during the 10th clock state before the counter rolls back to Q0.
12	Q5-9	output	Carry-out: HIGH while the counter is in states 0..4 and LOW while in states 5..9, providing one output pulse per counter cycle to cascade counters.
13	CE	input	Clock enable (active LOW). When HIGH, the counter is inhibited and ignores clock edges; when LOW, the counter advances on rising CP edges.
14	CP	input	Clock input. The counter advances on the LOW-to-HIGH transition of CP while CE is LOW.
15	MR	input	Master reset (active HIGH, asynchronous). A HIGH level forces the counter to state 0 (Q0 HIGH) independent of CP and CE.
16	VDD	power_in	Positive supply voltage, 3 V to 15 V (absolute max 18 V).

Key specifications

Parameter	Value
Manufacturer	Nexperia
Package	SOP-16
Category	Logic
Pins	16

Ordering variants

Same part, different packaging or reel option.

HEF4017BTT
HEF4017BTP
HEF4017BTTT

CAD (KiCad official)

Symbol: HEF4017BT
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`hef4017bt.step`	217 KB	You want the bare part, or you mark your own boards.
`hef4017bt-etched.step`	1.9 MB	You want the part with `HEF4017BT` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 515 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Nexperia datasheet (18 pp, sha256 cb1aa5b34d48ab0f, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF