GN1302 from GN Semic, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC2	power_in	Primary supply pin in the dual-supply configuration. VCC1 is connected to the backup supply and holds time/date when the main supply fails. The GN1302 runs from whichever of VCC1/VCC2 is higher: when VCC2 > VCC1 + 0.2 V, VCC2 powers the chip; when VCC1 > VCC2, VCC1 powers the chip. Operating range 2.0 V to 5.5 V.
2	X1	passive	Connection to one terminal of an external 32.768 kHz crystal. Internal oscillator is designed for a crystal with 6 pF load capacitance. May alternatively be driven by an external 32.768 kHz oscillator signal on X1 (X2 left floating).
3	X2	passive	Second terminal of the external 32.768 kHz crystal. Leave floating when X1 is driven by an external oscillator.
4	GND	power_in	Power supply ground / reference for VCC1 and VCC2.
5	CE	input	Chip-enable input. Must be held high during any read or write on the 3-wire interface; going low terminates the transfer and places I/O in high-impedance. Has an internal ~40 kΩ (typ) pull-down to ground.
6	I/O	bidirectional	Bidirectional data pin of the 3-wire serial interface (push-pull output). Data is clocked in on SCLK rising edges and clocked out on SCLK falling edges. Has an internal ~40 kΩ (typ) pull-down to ground.
7	SCLK	input	Serial clock input used to synchronize data movement on the 3-wire interface. Has an internal ~40 kΩ (typ) pull-down to ground. Max clock rate 0.5 MHz at VCC=2.0 V, 2.0 MHz at VCC=5.0 V.
8	VCC1	power_in	Backup / secondary supply pin, used with a single supply plus a battery, or with a low-power backup battery. When the internal programmable trickle charger is enabled, this pin connects to a rechargeable energy source (e.g. supercap, NiMH). UL requires care to prevent reverse charging current when using a lithium cell.

Key specifications

Parameter	Value
Manufacturer	GN Semic
Package	SOP-8
Category	RTC
Pins	8

CAD (KiCad official)

Symbol: GN1302
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gn1302.step`	122 KB	You want the bare part, or you mark your own boards.
`gn1302-etched.step`	1.6 MB	You want the part with `GN1302` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 387 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GN Semic datasheet (14 pp, sha256 8e9ff7eea88fa85c, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF