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Contents

Pinout
Key specifications
Ordering variants
CAD (KiCad official)
3D model downloads
Provenance

README

markdown

GL823K-HCY04

Genesys Logic · USB Converters · SSOP-16-150mil

GL823K-HCY04 from Genesys Logic, in a SSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VSS	power_in	Power ground return. Tie to system ground plane together with pin 14.
2	D1	bidirectional	SD/MS data 1 signal. Bi-directional data line to the memory card socket (SD bus DAT1 / MS bus).
3	D0	bidirectional	SD/MS data 0 signal. Bi-directional data line to the memory card socket (SD bus DAT0 / MS bus).
4	CLK	output	SD/MS clock output to the memory card socket. Frequency is controlled by the internal card interface (up to SD/MMC card clock spec).
5	CMD	bidirectional	SD command signal / Memory Stick BS (Bus State) signal. Muxed between SD CMD and MS BS depending on which card protocol is active.
6	D3	bidirectional	SD/MS data 3 signal. Bi-directional data line to the memory card socket (SD bus DAT3 / MS bus).
7	D2	bidirectional	SD/MS data 2 signal. Bi-directional data line to the memory card socket (SD bus DAT2 / MS bus).
8	PMOS	power_out	Card power output (switched Vcc for the memory card socket) via on-chip power MOSFET. Sources up to 200mA to the flash card.
9	VDD	power_in	Digital 3.3V power supply for the core logic. Decouple with a low-ESR capacitor to VSS.
10	5V	power_in	VBUS 5V input from the USB host. Feeds the on-chip 5V-to-3.3V regulator.
11	GPIO	input	General-purpose I/O with internal pull-up when configured as input. Typically used for card detect / write-protect / mode-select strapping.
12	LED	output	Access LED driver output. Drives an indicator LED to show power / card-access activity.
13	VDDA	power_in	USB 2.0 PHY analog 3.3V power supply. Should be filtered/decoupled independently from digital VDD.
14	VSS	power_in	Power ground return. Tie to system ground together with pin 1.
15	DP	bidirectional	USB 2.0 differential data plus (D+). Analog PHY pin; route as a controlled 90Ω differential pair with DM.
16	DM	bidirectional	USB 2.0 differential data minus (D-). Analog PHY pin; route as a controlled 90Ω differential pair with DP.

Key specifications

Parameter	Value
Manufacturer	Genesys Logic
Package	SSOP-16-150mil
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

GL823K-HCY04HCYXX
GL823K-HCY04

CAD (KiCad official)

Symbol: GL823K-HCY04
Footprint: Package_SO:SSOP-16_5.3x6.2mm_P0.65mm
3D model: SSOP-16-150mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gl823k-hcy04.step`	217 KB	You want the bare part, or you mark your own boards.
`gl823k-hcy04-etched.step`	2.7 MB	You want the part with `GL823K-HCY04` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 684 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Genesys Logic datasheet (15 pp, sha256 1cd234445ebe7add, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF