GD25Q64ESIG from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Active-low Chip Select input. Drive low to select the device for a command; must be held high when the device is idle (do not leave floating after power-on).
2	SO/IO1	bidirectional	Serial Data Output in Standard SPI mode (SO); becomes bidirectional Data I/O 1 (IO1) in Dual and Quad SPI modes.
3	WP#/IO2	bidirectional	Active-low Write Protect input (protects BP4-BP0 and SRP bits in the status register) in Standard/Dual SPI; becomes bidirectional Data I/O 2 (IO2) when Quad Enable (QE) bit is set for Quad SPI operation.
4	VSS	power_in	Ground reference (0 V) for supply and I/O signals.
5	SI/IO0	bidirectional	Serial Data Input in Standard SPI mode (SI); becomes bidirectional Data I/O 0 (IO0) in Dual and Quad SPI modes. Data is latched on the rising edge of SCLK.
6	SCLK	input	Serial Clock input. Supports SPI modes 0 and 3 up to 133 MHz for fast read; data in is sampled on the rising edge and data out shifts on the falling edge.
7	HOLD#/IO3	bidirectional	Active-low Hold input in Standard/Dual SPI: when HOLD# is low with SCLK low the serial communication is paused and SO becomes high-Z. In Quad SPI (QE=1) this pin acts as bidirectional Data I/O 3 (IO3) and the HOLD function is disabled.
8	VCC	power_in	Single power supply input, full voltage range 2.7 V to 3.6 V. Device auto-resets when VCC drops below the write-inhibit threshold VWI.

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	SOP-8-208mil
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

GD25Q64ESIG
GD25Q64ESIGESJG
GD25Q64ESIGESEG
GD25Q64ESIGESFG
GD25Q64ESIGETIG
GD25Q64ESIGETJG
GD25Q64ESIGETEG
GD25Q64ESIGETFG
GD25Q64ESIGEFIG
GD25Q64ESIGEFJG
GD25Q64ESIGEFEG
GD25Q64ESIGEFFG
GD25Q64ESIGENIG
GD25Q64ESIGENJG
GD25Q64ESIGENEG
GD25Q64ESIGENFG
GD25Q64ESIGEQIG
GD25Q64ESIGEQJG
GD25Q64ESIGEQEG
GD25Q64ESIGEQFG
GD25Q64ESIGEWIG
GD25Q64ESIGEWJG
GD25Q64ESIGEWEG
GD25Q64ESIGEWFG
GD25Q64ESIGEYIG
GD25Q64ESIGEYJG
GD25Q64ESIGEYEG
GD25Q64ESIGEYFG
GD25Q64ESIGEZIG
GD25Q64ESIGEZJG
GD25Q64ESIGEZEG
GD25Q64ESIGEZFG
GD25Q64ESIGEBIG
GD25Q64ESIGEBJG
GD25Q64ESIGEBEG
GD25Q64ESIGEBFG

CAD (KiCad official)

Symbol: GD25Q64ESIG
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8-208mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd25q64esig.step`	122 KB	You want the bare part, or you mark your own boards.
`gd25q64esig-etched.step`	2.5 MB	You want the part with `GD25Q64ESIG` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 594 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (62 pp, sha256 578950858fdf4572, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF