GD25Q32ESIGR from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Chip Select input, active low. Must be driven high when the device is not selected; must not be left floating after power-on. Enables SPI communication and controls entry/exit of low-power/deselect states.
2	SO(IO1)	bidirectional	Serial Data Output in Standard SPI mode (SO). Becomes bidirectional data line IO1 in Dual/Quad SPI modes. Data is shifted out on the falling edge of SCLK.
3	WP#(IO2)	bidirectional	Write Protect input, active low, in Standard/Dual SPI modes; protects the Status Register Block Protect and SRP bits. Becomes bidirectional data line IO2 when Quad Enable (QE) bit in the Status Register is set to 1.
4	VSS	power_in	Ground reference for the device (0V).
5	SI(IO0)	bidirectional	Serial Data Input in Standard SPI mode (SI). Becomes bidirectional data line IO0 in Dual/Quad SPI modes. Input data is latched on the rising edge of SCLK.
6	SCLK	input	Serial Clock input. Provides the clock reference for all SPI transactions; SPI mode 0 and mode 3 are supported. Rated up to 133MHz (VCC=3.0-3.6V, 30pF load).
7	HOLD#(IO3)	bidirectional	Hold input, active low, in Standard/Dual SPI modes; pauses serial communication without deselecting the device. Becomes bidirectional data line IO3 when Quad Enable (QE) bit in the Status Register is set to 1.
8	VCC	power_in	Single power supply input. Operating range 2.7V to 3.6V. Decouple with a local bypass capacitor near the pin.

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	SOP-8-208mil
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

GD25Q32ESIGR
GD25Q32ESIGRTIGR

CAD (KiCad official)

Symbol: GD25Q32ESIGR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8-208mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd25q32esigr.step`	122 KB	You want the bare part, or you mark your own boards.
`gd25q32esigr-etched.step`	2.8 MB	You want the part with `GD25Q32ESIGR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 664 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (59 pp, sha256 f7b7ab327ffd9a02, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF