GD25Q32ESIG from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Chip Select input, active low. Must be driven high when the device is not selected; must not be left floating after power-on. A high-to-low transition enables the device and starts a command sequence.
2	SO/IO1	bidirectional	Serial Data Output (SO) in Standard SPI mode. Becomes bidirectional Data I/O 1 (IO1) in Dual and Quad SPI modes. Data shifts out on the falling edge of SCLK.
3	WP#/IO2	bidirectional	Write Protect input (active low) when the QE bit in the Status Register is 0; asserting WP# low locks the BP4-BP0 and SRP0/SRP1 bits (hardware protection). When QE=1 the pin becomes bidirectional Data I/O 2 (IO2) for Quad SPI operations. Must be driven high or pulled up if unused.
4	VSS	power_in	Device ground reference (0 V).
5	SI/IO0	bidirectional	Serial Data Input (SI) in Standard SPI mode. Becomes bidirectional Data I/O 0 (IO0) in Dual and Quad SPI modes. Data is latched on the rising edge of SCLK.
6	SCLK	input	Serial Clock input. Provides the timing reference for the SPI bus. SPI modes 0 and 3 supported; input data is latched on the rising edge and output data shifts on the falling edge. Max 133 MHz for fast-read operations.
7	HOLD#/IO3	bidirectional	Hold input (active low) when the QE bit is 0; asserting HOLD# low pauses serial communication while CS# is low without deselecting the device. When QE=1 the pin becomes bidirectional Data I/O 3 (IO3) for Quad SPI operations. Must be driven high or pulled up if unused.
8	VCC	power_in	Power supply input. Full voltage range 2.7-3.6 V. Below the Write Inhibit Voltage (VWI) threshold the device resets automatically.

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	SOP-8-208mil
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

GD25Q32ESIG
GD25Q32ESIGTIG
GD25Q32ESIGUF
GD25Q32ESIGUY
GD25Q32ESIGWF
GD25Q32ESIGG

CAD (KiCad official)

Symbol: GD25Q32ESIG
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8-208mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd25q32esig.step`	122 KB	You want the bare part, or you mark your own boards.
`gd25q32esig-etched.step`	2.6 MB	You want the part with `GD25Q32ESIG` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 614 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (60 pp, sha256 4eda438f26bc9bdd, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF