Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

GD25Q128ESIGR

GigaDevice Semicon Beijing · NOR FLASH · SOP-8-208mil

GD25Q128ESIGR from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select input (active low). Must be driven high when chip is not selected; do not leave floating after power-on. Enables/disables the device for SPI communication.
2 SO/IO1 bidirectional Serial Data Output in standard SPI mode. Becomes bidirectional Data I/O1 when using Dual or Quad SPI commands.
3 WP#/IO2 bidirectional Write Protect input (active low) in standard/Dual SPI modes; protects Block Protect (BP4-BP0) and SRP status register bits when driven low. Becomes bidirectional Data I/O2 in Quad SPI modes (requires QE=1 in status register).
4 VSS power_in Ground reference (0 V) for all supplies and signals.
5 SI/IO0 bidirectional Serial Data Input in standard SPI mode. Becomes bidirectional Data I/O0 when using Dual or Quad SPI commands.
6 SCLK input Serial Clock input. Provides the timing reference for all serial input/output operations. Supports up to 133MHz.
7 HOLD#/RESET#/IO3 bidirectional Multifunction pin acting as HOLD# (when HOLD/RST status bit = 0) or hardware RESET# (when HOLD/RST = 1) in standard/Dual SPI. Becomes bidirectional Data I/O3 in Quad SPI (when QE=1). RESET# requires low pulse ≥ tRLRH (1µs) to reset the flash.
8 VCC power_in Main power supply. Operating range 2.7 V to 3.6 V. Bypass with a decoupling capacitor to VSS.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package SOP-8-208mil
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • GD25Q128ESIGR
  • GD25Q128ESIGRSJG
  • GD25Q128ESIGRSEG
  • GD25Q128ESIGRFIG
  • GD25Q128ESIGRFIR
  • GD25Q128ESIGRQIG
  • GD25Q128ESIGRWIG
  • GD25Q128ESIGRYIG
  • GD25Q128ESIGRZIG
  • GD25Q128ESIGRZIR
  • GD25Q128ESIGRBIG
  • GD25Q128ESIGRBIR

CAD (KiCad official)

  • Symbol: GD25Q128ESIGR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-208mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
gd25q128esigr.step 122 KB You want the bare part, or you mark your own boards.
gd25q128esigr-etched.step 2.9 MB You want the part with GD25Q128ESIGR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 697 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (63 pp, sha256 54cb85133a09da0c, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF