GD25Q128ESIG from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Chip Select input (active low). Must be driven high when the chip is not selected; do not leave floating after power-on. Enables the SPI interface and command decoding when asserted low.
2	SO/IO1	bidirectional	Serial Data Output in Standard SPI mode; becomes bidirectional data line IO1 in Dual and Quad SPI modes. Shifts out on falling edge of SCLK in standard mode.
3	WP#/IO2	bidirectional	Write Protect input (active low) in Standard/Dual SPI modes, protecting the Status Register BP/SRP bits when SRP=1. Becomes bidirectional data line IO2 in Quad SPI mode when the QE bit in Status Register is set to 1.
4	VSS	power_in	Device ground reference (0V).
5	SI/IO0	bidirectional	Serial Data Input in Standard SPI mode; becomes bidirectional data line IO0 in Dual and Quad SPI modes. Data is latched on the rising edge of SCLK in standard mode.
6	SCLK	input	Serial Clock input. Supports SPI modes 0 and 3, up to 133MHz for fast reads with 30pF load. Provides timing reference for all serial input/output.
7	HOLD#/RESET#/IO3	bidirectional	Multi-function pin: acts as HOLD# input when HOLD/RST bit=0 (pauses serial communication when driven low), as RESET# input when HOLD/RST bit=1 (dedicated hardware reset with tRLRH ≥ 1µs), or as bidirectional data line IO3 in Quad SPI mode when QE=1.
8	VCC	power_in	Single power supply input, full voltage range 2.7V to 3.6V. Should be decoupled to VSS with a local bypass capacitor.

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	SOP-8-208mil
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

GD25Q128ESIG
GD25Q128ESIGSJG
GD25Q128ESIGSEG
GD25Q128ESIGSFG
GD25Q128ESIGFIG
GD25Q128ESIGFIR
GD25Q128ESIGFJG
GD25Q128ESIGFJR
GD25Q128ESIGFEG
GD25Q128ESIGFER
GD25Q128ESIGFFG
GD25Q128ESIGFFR
GD25Q128ESIGQIG
GD25Q128ESIGQJG
GD25Q128ESIGQEG
GD25Q128ESIGQFG
GD25Q128ESIGWIG
GD25Q128ESIGWJG
GD25Q128ESIGWEG
GD25Q128ESIGWFG
GD25Q128ESIGYIG
GD25Q128ESIGYJG
GD25Q128ESIGYEG
GD25Q128ESIGYFG
GD25Q128ESIGZIG
GD25Q128ESIGZIR
GD25Q128ESIGZJG
GD25Q128ESIGZJR
GD25Q128ESIGZEG
GD25Q128ESIGZER
GD25Q128ESIGZFG
GD25Q128ESIGZFR
GD25Q128ESIGBIG
GD25Q128ESIGBIR
GD25Q128ESIGBJG
GD25Q128ESIGBJR
GD25Q128ESIGBEG
GD25Q128ESIGBER
GD25Q128ESIGBFG
GD25Q128ESIGBFR

CAD (KiCad official)

Symbol: GD25Q128ESIG
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8-208mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd25q128esig.step`	122 KB	You want the bare part, or you mark your own boards.
`gd25q128esig-etched.step`	2.7 MB	You want the part with `GD25Q128ESIG` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 647 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (63 pp, sha256 54cb85133a09da0c, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF