EA8252O8R
Public Unreviewedby Ray
Everanalog IC design DC-DC Converters, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownEA8252O8R
Everanalog IC design · DC-DC Converters · SOP-8
EA8252O8R from Everanalog IC design, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | power_in | Power input for the internal high-side N-MOSFET gate driver. Connect a 33nF ceramic capacitor from BOOT to SWITCH. Absolute range VSWITCH-0.3V to VSWITCH+6.3V. |
| 2 | PWR | power_in | Main power input to the EA8252 (4.5V to 18V, abs max +20V). Bypass with two 10uF MLCCs to GND; if using electrolytics, add a 0.1uF ceramic close to the pin to suppress noise. |
| 3 | SWITCH | output | Internal MOSFET switching node output. Connect to an external L-C low-pass filter to produce the regulated DC output voltage. Absolute rating -1V to +20V. |
| 4 | GND | power_in | Ground reference for the controller and low-side MOSFET return. |
| 5 | FBK | input | Feedback input to the internal error amplifier. Connect a resistor divider from VOUT to FBK to GND to set the output voltage; internal reference VREF = 0.765V (typ). Abs max -0.3V to +6.3V. |
| 6 | NC | unconnected | No connect. Leave floating or tie to ground; not internally bonded to any function. |
| 7 | RUN | input | Enable / on-off control input. VIL <= 0.4V (off), VIH >= 2V (on). Internal 950kΩ pull-down to GND. For automatic startup, tie to PWR through a 150kΩ pull-up. Abs max -0.3V to +20V. |
| 8 | SST | passive | Soft-start programming pin. Connect a ceramic capacitor from SST to GND; the pin sources 5.5uA (typ) to set the soft-start ramp time. Abs max -0.3V to +6.3V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Everanalog IC design |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
EA8252O8REA8252O8RP8R
CAD (KiCad official)
- Symbol:
EA8252O8R - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ea8252o8r.step |
122 KB | You want the bare part, or you mark your own boards. |
ea8252o8r-etched.step |
2.3 MB | You want the part with EA8252O8R already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 545 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Everanalog IC design datasheet (7 pp, sha256
58069a748d5b4547, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).