DP4111
Public Unreviewedby Ray
Shenzhen Developer Microelec AC-DC Controllers and Regulators, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownDP4111
Shenzhen Developer Microelec · AC-DC Controllers and Regulators · SOP-8
DP4111 from Shenzhen Developer Microelec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | IC reference ground and source of the internal power MOSFET. Pins 1, 2, 3 are tied together internally. |
| 2 | GND | power_in | IC reference ground and source of the internal power MOSFET. Pins 1, 2, 3 are tied together internally. |
| 3 | GND | power_in | IC reference ground and source of the internal power MOSFET. Pins 1, 2, 3 are tied together internally. |
| 4 | VDD | power_in | IC supply pin. Internally regulated to ~7.1 V via a high-voltage LDO from the Drain pin (no auxiliary winding required). UVLO thresholds: VDD_ON=4.0 V typ, VDD_OFF=3.1 V typ; clamped at 7.4 V typ (5 mA). Recommended decoupling: ≥0.1 µF ceramic. |
| 5 | Drain | power_in | Drain of the internal synchronous-rectifier power MOSFET (BVDSS = 45 V, Rds_on ≈ 10 mΩ for DP4111). Pins 5, 6, 7, 8 are tied together internally for current handling. |
| 6 | Drain | power_in | Drain of the internal synchronous-rectifier power MOSFET (BVDSS = 45 V, Rds_on ≈ 10 mΩ for DP4111). Pins 5, 6, 7, 8 are tied together internally. |
| 7 | Drain | power_in | Drain of the internal synchronous-rectifier power MOSFET (BVDSS = 45 V, Rds_on ≈ 10 mΩ for DP4111). Pins 5, 6, 7, 8 are tied together internally. |
| 8 | Drain | power_in | Drain of the internal synchronous-rectifier power MOSFET (BVDSS = 45 V, Rds_on ≈ 10 mΩ for DP4111). Pins 5, 6, 7, 8 are tied together internally. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen Developer Microelec |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
DP4111
CAD (KiCad official)
- Symbol:
DP4111 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
dp4111.step |
122 KB | You want the bare part, or you mark your own boards. |
dp4111-etched.step |
1.1 MB | You want the part with DP4111 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 306 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen Developer Microelec datasheet (9 pp, sha256
8aaccc46363990e6, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).