DG419DY-T1-E3 from Vishay, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	D	passive	Drain (common terminal). Analog I/O common to both SPDT throws (S1 and S2). Bidirectional analog path; blocks up to the supply rail when the corresponding switch is off. Signal range ±15 V (bipolar) or 0-12 V (unipolar).
2	S1	passive	Source 1 (SPDT throw 1). Bidirectional analog terminal; connected to D when IN = logic 0 (SW1 ON). rDS(on) ≈ 20 Ω typical at V+/V- = ±15 V.
3	GND	power_in	Ground reference for the digital control input. Referenced to VL for logic thresholds (VIL ≤ 0.8 V, VIH ≥ 2.4 V).
4	V+	power_in	Positive analog supply. Operating range up to +15 V for bipolar operation, or up to +12 V unipolar (with V- = 0 V). Absolute maximum V+ referenced to V- is 44 V.
5	VL	power_in	Logic supply. Sets the input switching threshold for the IN pin (typ. VL = 5 V for TTL/CMOS compatibility). Range (GND - 0.3) to (V+) + 0.3 V.
6	IN	input	Digital control input, TTL/CMOS compatible. Logic 0 (≤ 0.8 V): SW1 ON, SW2 OFF. Logic 1 (≥ 2.4 V): SW1 OFF, SW2 ON. Input current typ. 5 nA.
7	V-	power_in	Negative analog supply. Typically -15 V for bipolar operation; tie to GND for unipolar (single-supply) operation. Absolute maximum V+ - V- ≤ 44 V.
8	S2	passive	Source 2 (SPDT throw 2). Bidirectional analog terminal; connected to D when IN = logic 1 (SW2 ON). Break-before-make guaranteed with S1 (tD ≈ 13 ns typ.).

Key specifications

Parameter	Value
Manufacturer	Vishay
Package	SOIC-8
Category	Interface
Pins	8

Ordering variants

Same part, different packaging or reel option.

DG419DY-T1-E3
DG419DY-T1-E3DY-E3
DG419DY-T1-E3DJ
DG419DY-T1-E3DJ-E3

CAD (KiCad official)

Symbol: DG419DY-T1-E3
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`dg419dy-t1-e3.step`	122 KB	You want the bare part, or you mark your own boards.
`dg419dy-t1-e3-etched.step`	2.0 MB	You want the part with `DG419DY-T1-E3` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 528 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Vishay datasheet (11 pp, sha256 32ddbc30ce7ed19a, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF