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COS722SR

COSINE · Operational Amplifier · SOIC-8

COS722SR from COSINE, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Output of amplifier A (channel 1). Output voltage swings to within ~1 mV (RL=100kΩ), ~8 mV (RL=10kΩ), or ~40 mV (RL=2kΩ) of each supply rail. Short-circuit source/sink ~21/22 mA.
2 -IN1 input Inverting input of amplifier A (channel 1). Allowed voltage range from -Vs - 0.3V to +Vs + 0.3V; input terminals are diode-clamped to the supply rails (limit current to <=10 mA).
3 +IN1 input Non-inverting input of amplifier A (channel 1). Rail-to-rail common-mode range (-0.1V to Vs+0.1V typical); same voltage-range limits as -IN1.
4 -Vs power_in Negative power supply or ground. For single-supply operation tie to GND; for dual-supply operation bypass to ground with a 0.1 µF ceramic capacitor placed close to the pin. Total supply (+Vs to -Vs) 2.5 V to 5.5 V (abs max 6.0 V).
5 +IN2 input Non-inverting input of amplifier B (channel 2). Rail-to-rail common-mode range; same voltage-range limits as -IN.
6 -IN2 input Inverting input of amplifier B (channel 2). Allowed voltage range from -Vs - 0.3V to +Vs + 0.3V; diode-clamped to supply rails (limit current to <=10 mA).
7 OUT2 output Output of amplifier B (channel 2). Output voltage swings to within millivolts of each supply rail; short-circuit source/sink ~21/22 mA.
8 +Vs power_in Positive power supply, 2.5 V to 5.5 V (absolute max 6.0 V referenced to -Vs). Bypass with a 0.1 µF ceramic capacitor as close as possible to the pin; add a 2.2 µF tantalum for better performance.

Key specifications

Parameter Value
Manufacturer COSINE
Package SOIC-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • COS722SR
  • COS722SRMR

CAD (KiCad official)

  • Symbol: COS722SR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cos722sr.step 122 KB You want the bare part, or you mark your own boards.
cos722sr-etched.step 2.0 MB You want the part with COS722SR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 481 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: COSINE datasheet (10 pp, sha256 c3bf767fb360554e, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF