CJ432 ±1% from Jiangsu, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	REF	input	Reference input. Compared internally to the 1.24V bandgap reference; when REF rises above Vref (~1.2400V, min 1.2214V / max 1.2586V at Ta=25°C) the device sinks current from cathode to anode. Reference input current is typically <1µA.
2	CATHODE	passive	Cathode (K). Shunt regulator output; sinks 0.1mA to 100mA in the on state. Maximum cathode voltage 18V; off-state leakage ~0.5µA at VKA=15V, VREF=0. Dynamic impedance ~0.5Ω at f≤1kHz.
3	ANODE	passive	Anode (A). Return terminal for the shunt current path; typically tied to circuit ground (or to the low side of the feedback divider in an adjustable-regulator configuration).

Key specifications

Parameter	Value
Manufacturer	Jiangsu
Package	SOT-23
Category	PMIC
Pins	3

CAD (KiCad official)

Symbol: CJ432 ±1%
Footprint: Package_TO_SOT_SMD:SOT-23
3D model: SOT-23 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`cj432-1.step`	59 KB	You want the bare part, or you mark your own boards.
`cj432-1-etched.step`	1.5 MB	You want the part with `CJ432 1%` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 370 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Jiangsu datasheet (4 pp, sha256 4298a1522dab0f25, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF