component
CH340G
Public Unreviewedby adom
WCH Jiangsu Qin Heng USB Converters, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
← Commit history
Regenerate .lbr with adom-lbr 2.23.0: pin lengths map to the nearest EAGLE stop (overlapping pins fixed), unnamed pins take the pad number instead of ~ and ~@2, symbol body graphics are preserved, descriptions on the symbol, deviceset and package rows, and the package takes the footprint's own name so variants of one part share one footprint. Verified with lint and validate.
1 file changed
+4−3
ch340g.lbr+4−3@@ -52,8 +52,8 @@ <library> <description>USB serial converter, UART, SOIC-16</description> <packages>-<package name="CH340G">- <description>CH340G</description>+<package name="SOIC-16_3.9x9.9mm_P1.27mm">+ <description>SOIC-16, 3.9 x 9.9 mm, 1.27 mm pitch</description> <smd name="1" x="-2.4750" y="4.4450" dx="1.9500" dy="0.6000" layer="1"/> <smd name="2" x="-2.4750" y="3.1750" dx="1.9500" dy="0.6000" layer="1"/> <smd name="3" x="-2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>@@ -94,6 +94,7 @@ </packages> <symbols> <symbol name="CH340G">+ <description>USB serial converter, UART, SOIC-16</description> <wire x1="-12.7" y1="15.239999999999998" x2="12.7" y2="15.239999999999998" width="0.254" layer="94"/> <wire x1="12.7" y1="15.239999999999998" x2="12.7" y2="-15.239999999999998" width="0.254" layer="94"/> <wire x1="12.7" y1="-15.239999999999998" x2="-12.7" y2="-15.239999999999998" width="0.254" layer="94"/>@@ -125,7 +126,7 @@ <gate name="G$1" symbol="CH340G" x="0" y="0"/> </gates> <devices>- <device name="" package="CH340G">+ <device name="" package="SOIC-16_3.9x9.9mm_P1.27mm"> <connects> <connect gate="G$1" pin="GND" pad="1"/> <connect gate="G$1" pin="TXD" pad="2"/>