CD74HC4052PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	B0	bidirectional	Bank B channel 0 analog in/out. Connected to COM B (pin 3) when S1:S0 = 00 and E is low. Bidirectional analog switch pin; signal range VEE ≤ V ≤ VCC.
2	B2	bidirectional	Bank B channel 2 analog in/out. Connected to COM B (pin 3) when S1:S0 = 10 and E is low. Bidirectional analog switch pin; signal range VEE ≤ V ≤ VCC.
3	COM_B	bidirectional	Bank B common out/in. Routed to one of B0..B3 based on the S1:S0 select code when enable E is low. Bidirectional analog signal.
4	B3	bidirectional	Bank B channel 3 analog in/out. Connected to COM B (pin 3) when S1:S0 = 11 and E is low. Bidirectional analog switch pin.
5	B1	bidirectional	Bank B channel 1 analog in/out. Connected to COM B (pin 3) when S1:S0 = 01 and E is low. Bidirectional analog switch pin.
6	~{E}	input	Active-low enable. When high, all switches are forced OFF (disconnected). When low, the S1:S0 code selects one of the four channels in each bank.
7	VEE	power_in	Negative analog supply. Sets the lower limit of the analog signal range on the switch pins. Typically 0 V (single supply) or a negative rail (bipolar operation); VCC−VEE up to 10 V.
8	GND	power_in	Digital ground reference for the logic-level inputs S0, S1, and E. Also serves as the 0 V reference for VCC and VEE.
9	S1	input	Channel select bit 1 (MSB of the 2-bit select code). Digital CMOS input referenced to VCC/GND; VIH ≥ 2 V, VIL ≤ 0.8 V for HCT-compatible operation.
10	S0	input	Channel select bit 0 (LSB of the 2-bit select code). Digital CMOS input referenced to VCC/GND.
11	A3	bidirectional	Bank A channel 3 analog in/out. Connected to COM A (pin 13) when S1:S0 = 11 and E is low. Bidirectional analog switch pin.
12	A0	bidirectional	Bank A channel 0 analog in/out. Connected to COM A (pin 13) when S1:S0 = 00 and E is low. Bidirectional analog switch pin.
13	COM_A	bidirectional	Bank A common out/in. Routed to one of A0..A3 based on the S1:S0 select code when enable E is low. Bidirectional analog signal.
14	A1	bidirectional	Bank A channel 1 analog in/out. Connected to COM A (pin 13) when S1:S0 = 01 and E is low. Bidirectional analog switch pin.
15	A2	bidirectional	Bank A channel 2 analog in/out. Connected to COM A (pin 13) when S1:S0 = 10 and E is low. Bidirectional analog switch pin.
16	VCC	power_in	Positive supply, 2 V to 6 V for HC. Sets the upper limit of the analog signal range. Decouple with a 100 nF ceramic capacitor to GND close to the pin.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

CD74HC4052PWR
CD74HC4052PWRD
CD74HC4052PWRDR
CD74HC4052PWRNS
CD74HC4052PWRNSR
CD74HC4052PWRN
CD74HC4052PWRJ

CAD (KiCad official)

Symbol: CD74HC4052PWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`cd74hc4052pwr.step`	205 KB	You want the bare part, or you mark your own boards.
`cd74hc4052pwr-etched.step`	2.8 MB	You want the part with `CD74HC4052PWR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 703 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (50 pp, sha256 7bf0d4b1a02045fc, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF