CD4504BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC	power_in	Low-level supply voltage input (input logic-level reference). Sets the logic-high threshold for the six inputs; in TTL-CMOS mode VCC is typically 5 V while VDD is higher. Range 5 V to 18 V, must not exceed VDD except by allowed margins.
2	A_OUT	output	Level-shifted output A, swings between VSS and VDD. Standardized symmetrical CMOS output driving the high-voltage side.
3	A_IN	input	Level-shifter input A. Accepts TTL or CMOS logic referenced to VCC; input can exceed both VCC and VDD supplies. Threshold set by SELECT mode.
4	B_OUT	output	Level-shifted output B, swings between VSS and VDD. Standardized symmetrical CMOS output.
5	B_IN	input	Level-shifter input B. Accepts TTL or CMOS logic referenced to VCC; input can exceed both supplies.
6	C_OUT	output	Level-shifted output C, swings between VSS and VDD.
7	C_IN	input	Level-shifter input C. Accepts TTL or CMOS logic referenced to VCC; input can exceed both supplies.
8	VSS	power_in	Negative supply / ground reference for the device (pin 8 per functional diagram).
9	D_IN	input	Level-shifter input D. Accepts TTL or CMOS logic referenced to VCC; input can exceed both supplies.
10	D_OUT	output	Level-shifted output D, swings between VSS and VDD.
11	E_IN	input	Level-shifter input E. Accepts TTL or CMOS logic referenced to VCC; input can exceed both supplies.
12	E_OUT	output	Level-shifted output E, swings between VSS and VDD.
13	SELECT	input	TTL/CMOS mode-select input. HIGH (at VCC) = CMOS-CMOS mode; LOW (at VSS) = TTL-CMOS mode. Per Note 1 of the static electrical table, only the CMOS-CMOS input thresholds apply to this pin (P13).
14	F_IN	input	Level-shifter input F. Accepts TTL or CMOS logic referenced to VCC; input can exceed both supplies.
15	F_OUT	output	Level-shifted output F, swings between VSS and VDD.
16	VDD	power_in	High-level (output-side) supply voltage. Range 5 V to 18 V (absolute max 20 V referenced to VSS). Sets the output-high level for the six level-shifted outputs.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	Logic
Pins	16

Ordering variants

Same part, different packaging or reel option.

CD4504BPWR
CD4504BPWRPWE4
CD4504BPWR.A
CD4504BPWRPW.A
CD4504BPWRBE
CD4504BPWRBEE4
CD4504BPWRBE.A
CD4504BPWRBF3A
CD4504BPWRBF3A.A
CD4504BPWRBM
CD4504BPWRBM96
CD4504BPWRBM96E4
CD4504BPWRBME4
CD4504BPWRBMG4
CD4504BPWRBMT
CD4504BPWRBM.A
CD4504BPWRBM96.A
CD4504BPWRBMT.A

CAD (KiCad official)

Symbol: CD4504BPWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`cd4504bpwr.step`	205 KB	You want the bare part, or you mark your own boards.
`cd4504bpwr-etched.step`	2.5 MB	You want the part with `CD4504BPWR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 630 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (16 pp, sha256 40b53a497e531a99, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF