CD4093BM96
Public Unreviewedby Ray
Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownCD4093BM96
Texas Instruments · Gates · SOIC-14
CD4093BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Schmitt-trigger input A of NAND gate 1. High-impedance CMOS input protected by internal diode network; typical input current 10 pA. Hysteresis (VP-VN) ~0.9 V at VDD=5 V, ~2.3 V at VDD=10 V. |
| 2 | 1B | input | Schmitt-trigger input B of NAND gate 1. High-impedance CMOS input; unused inputs must be tied to VDD or VSS (not floated). Same hysteresis characteristics as pin 1. |
| 3 | 1J | output | NAND output of gate 1 (J = A·B, i.e. NAND of pins 1 and 2). Standardized symmetrical CMOS output; typical IOL/IOH ~1 mA at VDD=5 V, rising with supply. |
| 4 | 2K | output | NAND output of gate 2 (K = C·D, NAND of pins 5 and 6). Symmetrical CMOS push-pull output. |
| 5 | 2C | input | Schmitt-trigger input C of NAND gate 2. Same characteristics as pin 1. |
| 6 | 2D | input | Schmitt-trigger input D of NAND gate 2. Same characteristics as pin 1. |
| 7 | VSS | power_in | Negative supply / ground reference (0 V). All logic levels and hysteresis thresholds are referenced to VSS. |
| 8 | 3E | input | Schmitt-trigger input E of NAND gate 3. Same characteristics as pin 1. |
| 9 | 3F | input | Schmitt-trigger input F of NAND gate 3. Same characteristics as pin 1. |
| 10 | 3L | output | NAND output of gate 3 (L = E·F, NAND of pins 8 and 9). Symmetrical CMOS push-pull output. |
| 11 | 4M | output | NAND output of gate 4 (M = G·H, NAND of pins 12 and 13). Symmetrical CMOS push-pull output. |
| 12 | 4G | input | Schmitt-trigger input G of NAND gate 4. Same characteristics as pin 1. |
| 13 | 4H | input | Schmitt-trigger input H of NAND gate 4. Same characteristics as pin 1. |
| 14 | VDD | power_in | Positive supply. Recommended operating range 3 V to 18 V (absolute max -0.5 V to +20 V referenced to VSS). Bypass with a decoupling capacitor close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
CD4093BM96MCD4093BM96CD4093BM96E4CD4093BM96G4CD4093BM96MG4CD4093BM96MTCD4093BM96ECD4093BM96EE4CD4093BM96FCD4093BM96F3ACD4093BM96NSRCD4093BM96NSRG4CD4093BM96PWCD4093BM96PWG4CD4093BM96PWR
CAD (KiCad official)
- Symbol:
CD4093BM96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
cd4093bm96.step |
195 KB | You want the bare part, or you mark your own boards. |
cd4093bm96-etched.step |
2.8 MB | You want the part with CD4093BM96 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 674 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
614c8d95c9092c8e, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).