CD4052BM96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	0Y	bidirectional	Y-side channel 0 in/out. Analog switch terminal connected to COMMON Y (pin 3) when A=0, B=0, INH=0.
2	2Y	bidirectional	Y-side channel 2 in/out. Connected to COMMON Y (pin 3) when A=0, B=1, INH=0.
3	COMY	bidirectional	COMMON Y OUT/IN. Analog common terminal of the Y multiplexer; routed to the selected 0Y..3Y channel.
4	3Y	bidirectional	Y-side channel 3 in/out. Connected to COMMON Y (pin 3) when A=1, B=1, INH=0.
5	1Y	bidirectional	Y-side channel 1 in/out. Connected to COMMON Y (pin 3) when A=1, B=0, INH=0.
6	INH	input	Inhibit (active-high). When INH = logic 1 all eight X/Y channels are OFF regardless of A/B. Digital signal level VDD-VSS (3 V to 20 V).
7	VEE	power_in	Analog negative supply. Sets the lower limit of the analog signal range; VDD-VEE ≤ 20 V. Typically tied to VSS for unipolar operation, or to a negative rail for bipolar analog signals.
8	VSS	power_in	Digital ground / logic negative supply reference. Digital control-input levels are referred to VSS.
9	B	input	Binary address input B (MSB of 2-bit channel select). CMOS logic level referenced VSS..VDD.
10	A	input	Binary address input A (LSB of 2-bit channel select). CMOS logic level referenced VSS..VDD.
11	3X	bidirectional	X-side channel 3 in/out. Connected to COMMON X (pin 13) when A=1, B=1, INH=0.
12	0X	bidirectional	X-side channel 0 in/out. Connected to COMMON X (pin 13) when A=0, B=0, INH=0.
13	COMX	bidirectional	COMMON X OUT/IN. Analog common terminal of the X multiplexer; routed to the selected 0X..3X channel.
14	1X	bidirectional	X-side channel 1 in/out. Connected to COMMON X (pin 13) when A=1, B=0, INH=0.
15	2X	bidirectional	X-side channel 2 in/out. Connected to COMMON X (pin 13) when A=0, B=1, INH=0.
16	VDD	power_in	Positive supply. VDD-VSS = 3 V to 20 V for digital control; VDD-VEE ≤ 20 V for the analog switch. Bypass with 0.1 µF ceramic to VSS.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

CD4052BM96M
CD4052BM96MT
CD4052BM96
CD4052BM96E
CD4052BM96BE
CD4052BM96F3A
CD4052BM96BF3A
CD4052BM96NSR
CD4052BM96BNSR
CD4052BM96PW
CD4052BM96PWR
CD4052BM96BPW
CD4052BM96BPWR

CAD (KiCad official)

Symbol: CD4052BM96
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`cd4052bm96.step`	217 KB	You want the bare part, or you mark your own boards.
`cd4052bm96-etched.step`	2.8 MB	You want the part with `CD4052BM96` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 677 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (28 pp, sha256 3d02dc5e1cebb4c2, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF