CD4046BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PHASE_PULSES	output	Phase pulses output. Goes high to indicate a locked condition when using phase comparator II. Useful for driving a lock indicator.
2	PHASE_COMP_I_OUT	output	Phase Comparator I output. Exclusive-OR network output; requires a 50% duty cycle on the signal and comparator inputs to maximize lock range.
3	COMPARATOR_IN	input	Comparator input for both phase comparators. Full CMOS logic swing available; can be direct-coupled from CMOS logic or AC-coupled for smaller signal swings.
4	VCO_OUT	output	VCO output. Full CMOS logic swing at VDD; can drive CMOS frequency dividers (CD4018, CD4020, CD4022, CD4024, CD4029, CD4059).
5	INHIBIT	input	VCO and source-follower ON/OFF control. Logic 0 enables the VCO and source follower; logic 1 turns them off to minimize standby power (ultra-low standby).
6	C1_A	passive	VCO timing capacitor C1 terminal A. External capacitor C1 (>=50 pF at VDD>=10V, >=100pF at 5V) connected between pins 6 and 7 sets VCO frequency with R1/R2.
7	C1_B	passive	VCO timing capacitor C1 terminal B. External capacitor C1 connected between pins 6 and 7 sets VCO frequency with R1/R2.
8	VSS	power_in	Negative supply / ground (0 V reference). Supply voltage range 3-18 V referenced from VDD (pin 16).
9	VCO_IN	input	VCO input (control voltage). High input impedance (~10^12 ohms). Typically driven from the low-pass filter output on the phase-comparator output.
10	DEMODULATOR_OUT	output	Demodulator output (source follower). Provides the VCO input voltage buffered; when used, a load resistor Rs of 10k or more should be connected to VSS. Leave open when unused.
11	R1	passive	VCO timing resistor R1 terminal (R1 to VSS). Sets VCO frequency range with C1; 5k <= R1 <= 1M recommended.
12	R2	passive	VCO offset resistor R2 terminal (R2 to VSS). Optional; enables VCO frequency offset when present, R2 = infinity for no offset. 5k <= R2 <= 1M recommended.
13	PHASE_COMP_II_OUT	tri_state	Phase Comparator II output. Edge-controlled digital memory network with three-state output; drives low-pass filter to control VCO input.
14	SIGNAL_IN	input	Signal input to both phase comparators. Direct-coupled provides full CMOS logic swing (logic 0 < 30% VDD-VSS, logic 1 > 70% VDD-VSS); can be self-biased AC-coupled for smaller signals.
15	ZENER	passive	Zener diode cathode for supply regulation. 5.2 V (typ) zener (Vz = 4.45 to 6.15 V at Iz = 50 uA); dynamic resistance ~40 ohm at Iz = 1 mA. Leave open when unused.
16	VDD	power_in	Positive supply. Operating range 3-18 V (VCO fixed oscillator), 5-18 V (phase-locked-loop operation). Absolute maximum -0.5 V to +20 V referenced to VSS.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-16
Category	RTC
Pins	16

Ordering variants

Same part, different packaging or reel option.

CD4046BPWR
CD4046BPWRE
CD4046BPWRF3A
CD4046BPWRNSR

CAD (KiCad official)

Symbol: CD4046BPWR
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`cd4046bpwr.step`	205 KB	You want the bare part, or you mark your own boards.
`cd4046bpwr-etched.step`	2.5 MB	You want the part with `CD4046BPWR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 637 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (20 pp, sha256 5b8f7c0b007da6cf, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF