CD4011BM96
Public Unreviewedby Ray
Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownCD4011BM96
Texas Instruments · Gates · SOIC-14
CD4011BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A. High-impedance CMOS input protected by an internal clamp network. VIH min = 3.5 V at VDD = 5 V; input current typ 10 pA (max 0.1 uA). |
| 2 | 1B | input | Gate 1 input B. High-impedance CMOS input protected by an internal clamp network. Same DC characteristics as pin 1. |
| 3 | 1Y | output | Gate 1 NAND output: J = NOT(A AND B). Buffered CMOS push-pull output. IOL min = 1 mA @ VDD = 5 V (VOL = 0.4 V); IOH min = -1 mA @ VDD = 5 V (VOH = 4.6 V). |
| 4 | 2Y | output | Gate 2 NAND output: K = NOT(C AND D). Buffered CMOS push-pull output; same drive as pin 3. |
| 5 | 2A | input | Gate 2 input A. High-impedance CMOS input; same DC characteristics as pin 1. |
| 6 | 2B | input | Gate 2 input B. High-impedance CMOS input; same DC characteristics as pin 1. |
| 7 | VSS | power_in | Negative supply / ground reference. Typically 0 V. Absolute maximum supply range VSS to VDD is -0.5 V to +20 V. |
| 8 | 3A | input | Gate 3 input A. High-impedance CMOS input; same DC characteristics as pin 1. |
| 9 | 3B | input | Gate 3 input B. High-impedance CMOS input; same DC characteristics as pin 1. |
| 10 | 3Y | output | Gate 3 NAND output: L = NOT(E AND F). Buffered CMOS push-pull output; same drive as pin 3. |
| 11 | 4Y | output | Gate 4 NAND output: M = NOT(G AND H). Buffered CMOS push-pull output; same drive as pin 3. |
| 12 | 4A | input | Gate 4 input A. High-impedance CMOS input; same DC characteristics as pin 1. |
| 13 | 4B | input | Gate 4 input B. High-impedance CMOS input; same DC characteristics as pin 1. |
| 14 | VDD | power_in | Positive supply pin. Recommended operating range 3 V to 18 V (absolute max +20 V referenced to VSS). Decouple locally to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
CD4011BM96MCD4011BM96CD4011BM96E4CD4011BM96G4CD4011BM96ME4CD4011BM96MTCD4011BM96ECD4011BM96EE4CD4011BM96FCD4011BM96F3ACD4011BM96NSRCD4011BM96NSRG4CD4011BM96PWCD4011BM96PWE4CD4011BM96PWRCD4011BM96PWRG4
CAD (KiCad official)
- Symbol:
CD4011BM96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
cd4011bm96.step |
195 KB | You want the bare part, or you mark your own boards. |
cd4011bm96-etched.step |
2.4 MB | You want the part with CD4011BM96 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 609 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
07084a1a9eff0b9d, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).