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CD14538BM96
Public Unreviewedby Ray
Texas Instruments Monostable Multivibrators, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownCD14538BM96
Texas Instruments · Monostable Multivibrators · SOP-16
CD14538BM96 from Texas Instruments, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | C1 | passive | External timing capacitor connection for monostable 1. Connect C_ext between C1 and RC1; pulse width T = RC * C_ext * ln(2) approximately (see datasheet timing equation). |
| 2 | RC1 | passive | External timing resistor/capacitor node for monostable 1. External R connects from VDD to RC1; C_ext connects between C1 and RC1. |
| 3 | RESET1 | input | Active-low reset input for monostable 1. A low level immediately terminates the output pulse and holds Q1 low. |
| 4 | +T1 | input | Positive-edge trigger input for monostable 1. A low-to-high transition triggers the output pulse when RESET1 is high. |
| 5 | -T1 | input | Negative-edge trigger input for monostable 1. A high-to-low transition triggers the output pulse when RESET1 is high. |
| 6 | Q1 | output | True output of monostable 1. Goes high for the programmed pulse width when triggered; retriggerable and resettable. |
| 7 | Q1_BAR | output | Complementary (inverted) output of monostable 1. Goes low for the programmed pulse width when triggered. |
| 8 | VSS | power_in | Ground / negative supply reference (0 V). |
| 9 | Q2_BAR | output | Complementary (inverted) output of monostable 2. Goes low for the programmed pulse width when triggered. |
| 10 | Q2 | output | True output of monostable 2. Goes high for the programmed pulse width when triggered; retriggerable and resettable. |
| 11 | -T2 | input | Negative-edge trigger input for monostable 2. A high-to-low transition triggers the output pulse when RESET2 is high. |
| 12 | +T2 | input | Positive-edge trigger input for monostable 2. A low-to-high transition triggers the output pulse when RESET2 is high. |
| 13 | RESET2 | input | Active-low reset input for monostable 2. A low level immediately terminates the output pulse and holds Q2 low. |
| 14 | RC2 | passive | External timing resistor/capacitor node for monostable 2. External R connects from VDD to RC2; C_ext connects between C2 and RC2. |
| 15 | C2 | passive | External timing capacitor connection for monostable 2. Connect C_ext between C2 and RC2. |
| 16 | VDD | power_in | Positive supply voltage input. Operating range 3 V to 18 V (CMOS). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
CD14538BM96CD14538BM96MCD14538BM96ECD14538BM96N
CAD (KiCad official)
- Symbol:
CD14538BM96 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (19 pp, sha256
7f39646e79273f97, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).